# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher.
# This patch includes the following deltas:
# ChangeSet 1.1069.1.40+1.1063.1.22 -> 1.1069.3.1
# drivers/char/drm/drm_agpsupport.h 1.10.1.6 -> 1.16
# include/linux/sysctl.h 1.23.1.8 -> 1.29
# kernel/sysctl.c 1.19.1.7 -> 1.23.1.1
# Makefile 1.190.1.50 -> 1.193.1.28
# include/asm-ia64/page.h 1.6.1.2 -> 1.7.1.1
# arch/ia64/kernel/setup.c 1.11.3.5 -> 1.11.2.2
# fs/proc/proc_misc.c 1.20.1.2 -> 1.23.1.1
# drivers/char/agp/agpgart_be.c 1.41.1.16 -> 1.41.1.17
# drivers/char/drm/r128_cce.c 1.5.1.1 -> 1.10
# arch/ia64/kernel/ivt.S 1.6.1.2 -> 1.8.1.1
# drivers/char/drm/drm_memory.h 1.3.1.1 -> 1.5
# init/main.c 1.27.1.2 -> 1.30
# drivers/char/drm/radeon_cp.c 1.6.1.1 -> 1.10
# drivers/char/Config.in 1.36.1.19 -> 1.39.1.10
# include/asm-ppc/pgtable.h 1.18.1.2 -> 1.20
# drivers/char/drm/drm_bufs.h 1.5.1.1 -> 1.7
# include/linux/fs.h 1.69.1.20 -> 1.76.1.3
# drivers/char/drm/drm_drv.h 1.4.1.1 -> 1.6
# drivers/pci/pci.c 1.36.1.9 -> 1.38.1.5
# drivers/net/Makefile 1.29.1.10 -> 1.33.1.4
# arch/ia64/mm/Makefile 1.1.2.1 -> 1.1.1.4
# arch/i386/kernel/mpparse.c 1.27.1.5 -> 1.30.1.2
# drivers/char/drm/mga_dma.c 1.4.1.2 -> 1.7
# arch/i386/config.in 1.43.1.4 -> 1.44.1.2
# arch/i386/kernel/io_apic.c 1.27.1.5 -> 1.29.1.3
# drivers/char/drm/i810_dma.c 1.7.1.2 -> 1.9.1.1
# include/asm-ia64/processor.h 1.16.3.7 -> 1.16.2.4
# mm/mprotect.c 1.4.1.1 -> 1.6
# arch/i386/kernel/pci-pc.c 1.30.1.2 -> 1.31.1.1
# include/linux/pci_ids.h 1.44.1.31 -> 1.46.1.20
# drivers/net/tg3.c 1.61.2.37 -> 1.62.1.5
# drivers/char/agp/agp.h 1.18.1.4 -> 1.24
# arch/ia64/mm/init.c 1.7.4.3 -> 1.7.3.2
# mm/memory.c 1.51.1.5 -> 1.54.1.6
# arch/i386/kernel/setup.c 1.68.1.4 -> 1.70.1.3
# arch/ia64/kernel/acpi.c 1.6.3.15 -> 1.6.4.4
# arch/ia64/config.in 1.13.5.5 -> 1.13.4.4
# drivers/pci/pci.ids 1.44 -> 1.45
# drivers/net/tg3.h 1.25.1.7 -> 1.27.1.2
# arch/ia64/hp/common/sba_iommu.c 1.1.2.12 -> 1.1.3.2
# drivers/char/drm/drmP.h 1.9.1.1 -> 1.11
# include/linux/agp_backend.h 1.13.1.6 -> 1.20
# drivers/char/drm-4.0/agpsupport.c 1.1.1.4 -> 1.8
# drivers/hotplug/acpiphp_glue.c 1.5.1.1 -> 1.7
# Documentation/Configure.help 1.166.1.8 -> 1.166.1.9
# drivers/char/Makefile 1.27.1.10 -> 1.31.1.4
# fs/inode.c 1.36.1.4 -> 1.40.1.1
# arch/i386/kernel/pci-irq.c 1.20.1.4 -> 1.22.1.2
# kernel/printk.c 1.9.1.4 -> 1.14
# drivers/char/drm/drm_vm.h 1.12.1.2 -> 1.15
#
diff -Nru a/Documentation/Configure.help b/Documentation/Configure.help
--- a/Documentation/Configure.help Wed Oct 8 09:06:27 2003
+++ b/Documentation/Configure.help Wed Oct 8 09:06:27 2003
@@ -2,8 +2,6 @@
# Eric S. Raymond <mailto:esr@thyrsus.com>
# Steven Cole <mailto:elenstev@mesatop.com>
#
-# Version 3.01: current with 2.4.19+
-#
# Translations of this file available on the WWW:
#
# - Japanese, maintained by the JF Project <mailto:JF@linux.or.jp>, at
@@ -19,13 +17,6 @@
# - Catalan, by Antoni Bella <mailto:bella5@teleline.es>, at
# <http://www.terra.es/personal7/bella5/traduccions.htm>
#
-# To access a document on the WWW, you need to have a direct Internet
-# connection and a browser program such as netscape or lynx. If you
-# only have email access, you can still use FTP and WWW servers: send
-# an email to <mailto:mail-server@rtfm.mit.edu> with the text
-# send usenet/news.answers/internet-services/access-via-email
-# in the body of the message.
-#
# Information about what a kernel is, what it does, how to patch and
# compile it and much more is contained in the Kernel-HOWTO, available
# at <http://www.tldp.org/docs.html#howto>. Before you start
@@ -137,6 +128,15 @@
If you don't know what to do here, say N.
+Maximum number of CPUs
+CONFIG_NR_CPUS
+ This allows you to specify the maximum number of CPUs which this
+ kernel will support. The maximum supported value is 32 and the
+ mimimum value which makes sense is 2.
+
+ This is purely to save memory - each supported CPU adds
+ approximately eight kilobytes to the kernel image.
+
Intel or compatible 80x86 processor
CONFIG_X86
This is Linux's home port. Linux was originally native to the Intel
@@ -1141,6 +1141,15 @@
Say Y here if you have an IDE controller which uses any of these
chipsets: CMD643, CMD646 and CMD648.
+Compaq Triflex IDE support
+CONFIG_BLK_DEV_TRIFLEX
+ Say Y here if you have a Compaq Triflex IDE controller, such
+ as those commonly found on Compaq Pentium-Pro systems
+
+ If you want to compile it as a module, say M here and read
+ <file:Documentation/modules.txt>. The module will be called
+ triflex.o.
+
CY82C693 chipset support
CONFIG_BLK_DEV_CY82C693
This driver adds detection and support for the CY82C693 chipset
@@ -1210,11 +1219,26 @@
This is a driver for the OPTi 82C621 EIDE controller.
Please read the comments at the top of <file:drivers/ide/pci/opti621.c>.
+National SCx200 chipset support
+CONFIG_BLK_DEV_SC1200
+ This driver adds support for the built in IDE on the National
+ SCx200 series of embedded x86 "Geode" systems
+
+ If you want to compile it as a module, say M here and read
+ <file:Documentation/modules.txt>. The module will be called
+ sc1200.o.
+
ServerWorks OSB4/CSB5 chipset support
CONFIG_BLK_DEV_SVWKS
This driver adds PIO/(U)DMA support for the ServerWorks OSB4/CSB5
chipsets.
+SGI IOC4 chipset support
+CONFIG_BLK_DEV_SGIIOC4
+ This driver adds PIO & MultiMode DMA-2 support for the SGI IOC4
+ chipset. Please say Y here, if you have an Altix System from
+ Silicon Graphics Inc.
+
Intel PIIXn chipsets support
CONFIG_BLK_DEV_PIIX
This driver adds PIO mode setting and tuning for all PIIX IDE
@@ -1264,6 +1288,29 @@
If unsure, say N.
+PROMISE PDC202{68|69|70|71|75|76|77} support
+CONFIG_BLK_DEV_PDC202XX_NEW
+ Promise Ultra 100 TX2 [PDC20268]
+ Promise Ultra 133 PTX2 [PDC20269]
+ Promise FastTrak LP/TX2/TX4 [PDC20270]
+ Promise FastTrak TX2000 [PDC20271]
+ Promise MB Ultra 133 [PDC20275]
+ Promise MB FastTrak 133 [PDC20276]
+ Promise FastTrak 133 [PDC20277]
+
+ This driver adds up to 4 more EIDE devices sharing a single
+ interrupt. This device is a bootable PCI UDMA controller. Since
+ multiple cards can be installed and there are BIOS ROM problems that
+ happen if the BIOS revisions of all installed cards (max of five) do
+ not match, the driver attempts to do dynamic tuning of the chipset
+ at boot-time for max speed. Ultra33 BIOS 1.25 or newer is required
+ for more than one card.
+
+ If you say Y here, you need to say Y to "Use DMA by default when
+ available" as well.
+
+ If unsure, say N.
+
Special UDMA Feature
CONFIG_PDC202XX_BURST
This option causes the pdc202xx driver to enable UDMA modes on the
@@ -2031,6 +2078,17 @@
The board uses the R4300 and a R5230 CPUs. For more information
about this board see <http://www.algor.co.uk/>.
+SGI SN2 L1 serial port support
+CONFIG_SGI_L1_SERIAL
+ If you have an SGI SN2 and you want to use the serial port connected
+ to the system controller (you want this!), say Y. Otherwise, say N.
+
+SGI SN2 L1 serial console support
+CONFIG_SGI_L1_SERIAL_CONSOLE
+ If you have an SGI SN2 and you would like to use the system
+ controller serial port as your console (you want this!), say Y.
+ Otherwise, say N.
+
Support for BAGET MIPS series
CONFIG_BAGET_MIPS
This enables support for the Baget, a Russian embedded system. For
@@ -3217,6 +3275,255 @@
If you want to compile it as a module, say M here and read
<file:Documentation/modules.txt>. If unsure, say `N'.
+IP: virtual server support
+CONFIG_IP_VS
+ IP Virtual Server support will let you build a high-performance
+ virtual server based on cluster of two or more real servers. This
+ option must be enabled for at least one of the clustered computers
+ that will take care of intercepting incomming connections to a
+ single IP address and scheduling them to real servers.
+
+ Three request dispatching techniques are implemented, they are
+ virtual server via NAT, virtual server via tunneling and virtual
+ server via direct routing. The several scheduling algorithms can
+ be used to choose which server the connection is directed to,
+ thus load balancing can be achieved among the servers. For more
+ information and its administration program, please visit the
+ following URL:
+ http://www.linuxvirtualserver.org/
+
+ If you want to compile it in kernel, say Y. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt. If
+ unsure, say N.
+
+IP virtual server debugging
+CONFIG_IP_VS_DEBUG
+ Say Y here if you want to get additional messages useful in
+ debugging the IP virtual server code. You can change the debug
+ level in /proc/sys/net/ipv4/vs/debug_level
+
+IPVS connection hash table size (the Nth power of 2)
+CONFIG_IP_VS_TAB_BITS
+ The IPVS connection hash table uses the chaining scheme to handle
+ hash collisions. Using a big IPVS connection hash table will greatly
+ reduce conflicts when there are hundreds of thousands of connections
+ in the hash table.
+
+ Note the table size must be power of 2. The table size will be the
+ value of 2 to the your input number power. The number to choose is
+ from 8 to 20, the default number is 12, which means the table size
+ is 4096. Don't input the number too small, otherwise you will lose
+ performance on it. You can adapt the table size yourself, according
+ to your virtual server application. It is good to set the table size
+ not far less than the number of connections per second multiplying
+ average lasting time of connection in the table. For example, your
+ virtual server gets 200 connections per second, the connection lasts
+ for 200 seconds in average in the connection table, the table size
+ should be not far less than 200x200, it is good to set the table
+ size 32768 (2**15).
+
+ Another note that each connection occupies 128 bytes effectively and
+ each hash entry uses 8 bytes, so you can estimate how much memory is
+ needed for your box.
+
+IPVS: round-robin scheduling
+CONFIG_IP_VS_RR
+ The robin-robin scheduling algorithm simply directs network
+ connections to different real servers in a round-robin manner.
+
+ If you want to compile it in kernel, say Y. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt. If
+ unsure, say N.
+
+IPVS: weighted round-robin scheduling
+CONFIG_IP_VS_WRR
+ The weighted robin-robin scheduling algorithm directs network
+ connections to different real servers based on server weights
+ in a round-robin manner. Servers with higher weights receive
+ new connections first than those with less weights, and servers
+ with higher weights get more connections than those with less
+ weights and servers with equal weights get equal connections.
+
+ If you want to compile it in kernel, say Y. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt. If
+ unsure, say N.
+
+IPVS: least-connection scheduling
+CONFIG_IP_VS_LC
+ The least-connection scheduling algorithm directs network
+ connections to the server with the least number of active
+ connections.
+
+ If you want to compile it in kernel, say Y. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt. If
+ unsure, say N.
+
+IPVS: weighted least-connection scheduling
+CONFIG_IP_VS_WLC
+ The weighted least-connection scheduling algorithm directs network
+ connections to the server with the least active connections
+ normalized by the server weight.
+
+ If you want to compile it in kernel, say Y. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt. If
+ unsure, say N.
+
+IPVS: locality-based least-connection scheduling
+CONFIG_IP_VS_LBLC
+ The locality-based least-connection scheduling algorithm is for
+ destination IP load balancing. It is usually used in cache cluster.
+ This algorithm usually directs packet destined for an IP address to
+ its server if the server is alive and under load. If the server is
+ overloaded (its active connection numbers is larger than its weight)
+ and there is a server in its half load, then allocate the weighted
+ least-connection server to this IP address.
+
+ If you want to compile it in kernel, say Y. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt. If
+ unsure, say N.
+
+IPVS: locality-based least-connection with replication scheduling
+CONFIG_IP_VS_LBLCR
+ The locality-based least-connection with replication scheduling
+ algorithm is also for destination IP load balancing. It is
+ usually used in cache cluster. It differs from the LBLC scheduling
+ as follows: the load balancer maintains mappings from a target
+ to a set of server nodes that can serve the target. Requests for
+ a target are assigned to the least-connection node in the target's
+ server set. If all the node in the server set are over loaded,
+ it picks up a least-connection node in the cluster and adds it
+ in the sever set for the target. If the server set has not been
+ modified for the specified time, the most loaded node is removed
+ from the server set, in order to avoid high degree of replication.
+
+ If you want to compile it in kernel, say Y. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt. If
+ unsure, say N.
+
+IPVS: destination hashing scheduling
+CONFIG_IP_VS_DH
+ The destination hashing scheduling algorithm assigns network
+ connections to the servers through looking up a statically assigned
+ hash table by their destination IP addresses.
+
+ If you want to compile it in kernel, say Y. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt. If
+ unsure, say N.
+
+IPVS: source hashing scheduling
+CONFIG_IP_VS_SH
+ The source hashing scheduling algorithm assigns network
+ connections to the servers through looking up a statically assigned
+ hash table by their source IP addresses.
+
+ If you want to compile it in kernel, say Y. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt. If
+ unsure, say N.
+
+IPVS: shortest expected delay scheduling
+CONFIG_IP_VS_SED
+ The shortest expected delay scheduling algorithm assigns network
+ connections to the server with the shortest expected delay. The
+ expected delay that the job will experience is (Ci + 1) / Ui if
+ sent to the ith server, in which Ci is the number of connections
+ on the the ith server and Ui is the fixed service rate (weight)
+ of the ith server.
+
+ If you want to compile it in kernel, say Y. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt. If
+ unsure, say N.
+
+IPVS: never queue scheduling
+CONFIG_IP_VS_NQ
+ The never queue scheduling algorithm adopts a two-speed model.
+ When there is an idle server available, the job will be sent to
+ the idle server, instead of waiting for a fast one. When there
+ is no idle server available, the job will be sent to the server
+ that minimize its expected delay (The Shortest Expected Delay
+ scheduling algorithm).
+
+ If you want to compile it in kernel, say Y. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt. If
+ unsure, say N.
+
+IPVS: FTP protocol helper
+CONFIG_IP_VS_FTP
+ FTP is a protocol that transfers IP address and/or port number in
+ the payload. In the virtual server via Network Address Translation,
+ the IP address and port number of real servers cannot be sent to
+ clients in ftp connections directly, so FTP protocol helper is
+ required for tracking the connection and mangling it back to that of
+ virtual service.
+
+ If you want to compile it in kernel, say Y. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt. If
+ unsure, say N.
+
+AH/ESP match support (EXPERIMENTAL)
+CONFIG_IP6_NF_MATCH_AHESP
+ This module allows one to match AH and ESP packets.
+
+ If you want to compile it as a module, say M here and read
+ <file:Documentation/modules.txt>. The modules will be called
+ ip6t_ah.o and ip6t_esp.o.
+
+ If unsure, say 'N'.
+
+Routing header match support
+CONFIG_IP6_NF_MATCH_RT
+ rt matching allows you to match packets based on the routing
+ header of the packet.
+
+ If you want to compile it as a module, say M here and read
+ <file:Documentation/modules.txt>. The module will be called
+ ip6t_rt.o.
+
+ If unsure, say 'N'.
+
+Hop-by-hop and Dst opts header match support
+CONFIG_IP6_NF_MATCH_OPTS
+ This allows one to match packets based on the hop-by-hop
+ and destination options headers of a packet.
+
+ If you want to compile it as a module, say M here and read
+ <file:Documentation/modules.txt>. The modules will be called
+ ip6t_hbh.o and ip6t_dst.o.
+
+ If unsure, say 'N'.
+
+Fragmentation header match support
+CONFIG_IP6_NF_MATCH_FRAG
+ frag matching allows you to match packets based on the fragmentation
+ header of the packet.
+
+ If you want to compile it as a module, say M here and read
+ <file:Documentation/modules.txt>. The module will be called
+ ip6t_frag.o.
+
+ If unsure, say 'N'.
+
+HL match support
+CONFIG_IP6_NF_MATCH_HL
+ HL matching allows you to match packets based on the hop
+ limit of the packet.
+
+ If you want to compile it as a module, say M here and read
+ <file:Documentation/modules.txt>. The module will be called
+ ip6t_hl.o.
+
+ If unsure, say 'N'.
+
+IPv6 Extension Headers Match (EXPERIMENTAL)
+CONFIG_IP6_NF_MATCH_IPV6HEADER
+ This module allows one to match packets based upon
+ the ipv6 extension headers.
+
+ If you want to compile it as a module, say M here and read
+ <file:Documentation/modules.txt>. The module will be called
+ ip6t_ipv6header.o.
+
+ If unsure, say 'N'.
+
SYN flood protection
CONFIG_SYN_COOKIES
Normal TCP/IP networking is open to an attack known as "SYN
@@ -3706,18 +4013,18 @@
Generic SiS support
CONFIG_AGP_SIS
- This option gives you AGP support for the GLX component of the "soon
- to be released" XFree86 4.x on Silicon Integrated Systems [SiS]
- chipsets.
+ This option gives you AGP support for the GLX component of
+ XFree86 4.x on Silicon Integrated Systems [SiS] chipsets.
- Note that 5591/5592 AGP chipsets are NOT supported.
+ Note that 5591/5592 AGP chipsets are NOT specifically supported;
+ However, the driver works well on these, too.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N.
Serverworks LE/HE support
CONFIG_AGP_SWORKS
- Say Y here to support the Serverworks AGP card. See
+ Say Y here to support the Serverworks AGP card. See
<http://www.serverworks.com/> for product descriptions and images.
NVIDIA chipset support
@@ -5107,21 +5414,23 @@
This is the frame buffer device driver for the Hitachi HD64461 LCD
frame buffer card.
-SIS acceleration
+SIS display support
CONFIG_FB_SIS
- This is the frame buffer device driver for the SiS 630 and 640 Super
- Socket 7 UMA cards. Specs available at <http://www.sis.com.tw/>.
+ This is the frame buffer device driver for the SiS 300, 315 and 330
+ series chipsets. Documentation available at the maintainer's site
+ at <http://www.winischhofer.net/linuxsisvga.shtml>.
-SIS 630/540/730 support
+SIS 300 series support
CONFIG_FB_SIS_300
- This is the frame buffer device driver for the SiS 630 and related
- Super Socket 7 UMA cards. Specs available at
- <http://www.sis.com.tw/>.
+ This enables support for SiS 300 series chipsets (300/305, 540, 630,
+ 730). Documentation available at the maintainer's website at
+ <http://www.winischhofer.net/linuxsisvga.shtml>.
-SIS 315H/315 support
+SIS 315/330 series support
CONFIG_FB_SIS_315
- This is the frame buffer device driver for the SiS 315 graphics
- card. Specs available at <http://www.sis.com.tw/>.
+ This enables support for SiS 315/330 series chipsets (315, 550, 650,
+ M650, 651, 661FX, M661FX, 740, 741, 330). Documentation available at
+ the maintainer's site <http://www.winischhofer.net/linuxsisvga.shtml>.
IMS Twin Turbo display support
CONFIG_FB_IMSTT
@@ -5177,6 +5486,17 @@
is at
<http://support.ati.com/products/pc/mach64/graphics_xpression.html>.
+Mach64 Generic LCD support
+CONFIG_FB_ATY_GENERIC_LCD
+ Enabling this option enables the Atyfb driver to drive LCD panels. It
+ will autodetect the resulution and format of your display and emulate
+ other resolutions using the hardware stretcher on the chip.
+ Say Y here if you have computer with a Rage LT Pro, Rage Mobility M1,
+ Rage XC or Rage XL chip and a laptop LCD display or any other LCD display
+ that needs to be digitally driven. It is not necessary to enable this
+ option if you are using an LCD display with a normal VGA connector,
+ but it won't hurt if you do.
+
ATI Radeon display support
CONFIG_FB_RADEON
Choose this option if you want to use an ATI Radeon graphics card as
@@ -6915,7 +7235,7 @@
CONFIG_CISS_SCSI_TAPE
When enabled (Y), this option allows SCSI tape drives and SCSI medium
changers (tape robots) to be accessed via a Compaq 5xxx array
- controller. (See Documentation/cciss.txt for more details.)
+ controller. (See <file:Documentation/cciss.txt> for more details.)
"SCSI support" and "SCSI tape support" must also be enabled for this
option to work.
@@ -6923,6 +7243,15 @@
When this option is disabled (N), the SCSI portion of the driver
is not compiled.
+Enable monitor thread
+CONFIG_CISS_MONITOR_THREAD
+ Intended for use with multipath configurations (see the md driver).
+ This option allows a per-adapter monitoring thread to periodically
+ poll the adapter to detect failure modes in which the processor
+ is unable to receive interrupts from the adapter, thus enabling
+ fail-over to an alternate adapter in such situations. See
+ <file:Documentation/cciss.txt> for more details.
+
QuickNet Internet LineJack/PhoneJack support
CONFIG_PHONE_IXJ
Say M if you have a telephony card manufactured by Quicknet
@@ -7087,6 +7416,16 @@
architecture is based on LSI Logic's Message Passing Interface (MPI)
specification.
+Maximum number of scatter gather entries
+CONFIG_FUSION_MAX_SGE
+ This option allows you to specify the maximum number of scatter-
+ gather entries per I/O. The driver defaults to 40, a reasonable number
+ for most systems. However, the user may increase this up to 128.
+ Increasing this parameter will require significantly more memory
+ on a per controller instance. Increasing the parameter is not
+ necessary (or recommended) unless the user will be running
+ large I/O's via the raw interface.
+
Fusion MPT enhanced SCSI error reporting [optional] module
CONFIG_FUSION_ISENSE
The isense module (roughly stands for Interpret SENSE data) is
@@ -7354,6 +7693,27 @@
there should be no noticeable performance impact as long as you have
logging turned off.
+QDIO base support for IBM S/390 and zSeries
+CONFIG_QDIO
+ This driver provides the Queued Direct I/O base support for the
+ IBM S/390 (G5 and G6) and eServer zSeries (z800 and z900).
+
+ For details please refer to the documentation provided by IBM at
+ <http://www10.software.ibm.com/developerworks/opensource/linux390>
+
+ This driver is also available as a module ( = code which can be
+ inserted in and removed from the running kernel whenever you want).
+ The module will be called qdio.o. If you want to compile it as a
+ module, say M here and read <file:Documentation/modules.txt>.
+
+ If unsure, say Y.
+
+Performance statistics for QDIO base support
+CONFIG_QDIO_PERF_STATS
+ Say Y here to get performance statistics in /proc/qdio_perf
+
+ If unsure, say N.
+
SGI WD93C93 SCSI Driver
CONFIG_SCSI_SGIWD93
Say Y here to support the on-board WD93C93 SCSI controller found (a)
@@ -8979,6 +9339,17 @@
Say Y if you really want or need the debugging output, everyone else
says N.
+CONFIG_IEEE1394_OUI_DB
+ If you say Y here, then an OUI list (vendor unique ID's) will be
+ compiled into the ieee1394 module. This doesn't really do much
+ except being able to display the vendor of a hardware node. The
+ downside is that it adds about 300k to the size of the module,
+ or kernel (depending on whether you compile ieee1394 as a
+ module, or static in the kernel).
+
+ This option is not needed for userspace programs like gscanbus
+ to show this information.
+
Network device support
CONFIG_NETDEVICES
You can say N here if you don't intend to connect your Linux box to
@@ -9902,36 +10273,17 @@
This driver supports the FarSync T-Series X.21 (and V.35/V.24) cards
from FarSite Communications Ltd.
Synchronous communication is supported on all ports at speeds up to
- 8Mb/s (128K on V.24) using synchronous PPP or Cisco HDLC.
+ 8Mb/s (128K on V.24) using synchronous PPP, Cisco HDLC, raw HDLC,
+ Frame Relay or X.25/LAPB.
If you want to compile this driver as a module ( = code which can be
inserted in and removed from the running kernel whenever you want)
say M here and read <file:Documentation/modules.txt>.
The module will be called farsync.o and if you want the module to be
automatically loaded when the interface is referenced then you
- should add "alias syncX farsync" to /etc/modules.conf for each
+ should add "alias hdlcX farsync" to /etc/modules.conf for each
interface, where X is 0, 1, 2, ...
-CONFIG_HDLC_DEBUG_PKT
- This option is for developers only - do NOT use on production
- systems.
-
-CONFIG_HDLC_DEBUG_HARD_HEADER
- This option is for developers only - do NOT use on production
- systems.
-
-CONFIG_HDLC_DEBUG_ECN
- This option is for developers only - do NOT use on production
- systems.
-
-CONFIG_HDLC_DEBUG_RINGS
- If you answer Y here you will be able to get a diagnostic dump of
- port's TX and RX packet rings, using "sethdlc hdlcX private"
- command. It does not affect normal operations.
-
- If unsure, say Y here.
-
-
Frame Relay (DLCI) support
CONFIG_DLCI
This is support for the frame relay protocol; frame relay is a fast
@@ -10804,6 +11156,15 @@
If unsure, say N here.
+Raw HDLC Ethernet device support
+CONFIG_HDLC_RAW_ETH
+ Say Y to this option if you want generic HDLC driver to support
+ raw HDLC Ethernet device emulation over WAN (Wide Area Network)
+ connections.
+ You will need it for Ethernet over HDLC bridges.
+
+ If unsure, say N here.
+
Cisco HDLC support
CONFIG_HDLC_CISCO
Say Y to this option if you want generic HDLC driver to support
@@ -10818,13 +11179,6 @@
If unsure, say N here.
-Frame-Relay bridging support
-CONFIG_HDLC_FR_BRIDGE
- Say Y to this option if you want generic HDLC driver to support
- bridging LAN frames over Frame-Relay links.
-
- If unsure, say N here.
-
Synchronous Point-to-Point Protocol (PPP) support
CONFIG_HDLC_PPP
Say Y to this option if you want generic HDLC driver to support
@@ -10867,6 +11221,25 @@
If unsure, say N here.
+CONFIG_HDLC_DEBUG_PKT
+ This option is for developers only - do NOT use on production
+ systems.
+
+CONFIG_HDLC_DEBUG_HARD_HEADER
+ This option is for developers only - do NOT use on production
+ systems.
+
+CONFIG_HDLC_DEBUG_ECN
+ This option is for developers only - do NOT use on production
+ systems.
+
+CONFIG_HDLC_DEBUG_RINGS
+ If you answer Y here you will be able to get a diagnostic dump of
+ port's TX and RX packet rings, using "sethdlc hdlcX private"
+ command. It does not affect normal operations.
+
+ If unsure, say Y here.
+
Ethernet (10 or 100Mbit)
CONFIG_NET_ETHERNET
Ethernet (also called IEEE 802.3 or ISO 8802-2) is the most common
@@ -11195,33 +11568,60 @@
The safe and default value for this is N.
-SysKonnect SK-98xx and SK-95xx Gigabit Ethernet Adapter family support
+Marvell Yukon / SysKonnect SK-98xx and SK-95xx Gigabit Ethernet Adapter family support
CONFIG_SK98LIN
- Say Y here if you have a SysKonnect SK-98xx or SK-95xx Gigabit
- Ethernet Server Adapter. The following adapters are supported by
- this driver:
- - SK-9521 10/100/1000Base-T Adapter
- - SK-9821 Gigabit Ethernet 1000Base-T Server Adapter
- - SK-9822 Gigabit Ethernet 1000Base-T Dual Port Server Adapter
- - SK-9841 Gigabit Ethernet 1000Base-LX Server Adapter
- - SK-9842 Gigabit Ethernet 1000Base-LX Dual Port Server Adapter
- - SK-9843 Gigabit Ethernet 1000Base-SX Server Adapter
- - SK-9844 Gigabit Ethernet 1000Base-SX Dual Port Server Adapter
- - SK-9861 Gigabit Ethernet 1000Base-SX Server Adapter
- - SK-9862 Gigabit Ethernet 1000Base-SX Dual Port Server Adapter
- - SK-9871 Gigabit Ethernet 1000Base-ZX Server Adapter
- - SK-9872 Gigabit Ethernet 1000Base-ZX Dual Port Server Adapter
+ Say Y here if you have a Marvell Yukon or SysKonnect SK-98xx/SK-95xx
+ compliant Gigabit Ethernet Adapter. The following adapters are supported
+ by this driver:
+ - 3Com 3C940 Gigabit LOM Ethernet Adapter
+ - 3Com 3C941 Gigabit LOM Ethernet Adapter
+ - SK-9821 Gigabit Ethernet Server Adapter (SK-NET GE-T)
+ - SK-9822 Gigabit Ethernet Server Adapter (SK-NET GE-T dual link)
+ - SK-9841 Gigabit Ethernet Server Adapter (SK-NET GE-LX)
+ - SK-9842 Gigabit Ethernet Server Adapter (SK-NET GE-LX dual link)
+ - SK-9843 Gigabit Ethernet Server Adapter (SK-NET GE-SX)
+ - SK-9844 Gigabit Ethernet Server Adapter (SK-NET GE-SX dual link)
+ - SK-9861 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition)
+ - SK-9862 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition dual link)
+ - SK-9871 Gigabit Ethernet Server Adapter (SK-NET GE-ZX)
+ - SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)
+ - Allied Telesyn AT-2970SX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970LX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970TX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2971SX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2971T Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970SX/2SC Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970LX/2SC Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970TX/2TX Gigabit Ethernet Adapter
+ - Marvell RDK-8001 Adapter
+ - Marvell RDK-8002 Adapter
+ - Marvell RDK-8003 Adapter
+ - Marvell RDK-8004 Adapter
+ - Marvell RDK-8006 Adapter
+ - Marvell RDK-8007 Adapter
+ - Marvell RDK-8008 Adapter
+ - Marvell RDK-8009 Adapter
+ - Marvell RDK-8011 Adapter
+ - Marvell RDK-8012 Adapter
+ - SK-9521 V2.0 10/100/1000Base-T Adapter
- SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter
- SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter
- SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter
- SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter
- SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter
- SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter
+ - SK-9521 10/100/1000Base-T Adapter
+ - DGE-530T Gigabit Ethernet Adapter
+ - Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter
+ - N-Way PCI-Bus Giga-Card 1000/100/10Mbps(L)
+ - EG1032 v2 Instant Gigabit Network Adapter
+ - EG1064 v2 Instant Gigabit Network Adapter
The adapters support Jumbo Frames.
The dual link adapters support link-failover and dual port features.
- The V2.0 adapters support the scatter-gather functionality with
- sendfile(). Read Documentation/networking/sk98lin.txt for information about
+ Both Marvell Yukon and SysKonnect SK-98xx/SK-95xx adapters support
+ the scatter-gather functionality with sendfile(). Please refer to
+ Documentation/networking/sk98lin.txt for more information about
optional driver parameters.
Questions concerning this driver may be addressed to:
linux@syskonnect.de
@@ -11231,6 +11631,122 @@
say M here and read Documentation/modules.txt. This is recommended.
The module will be called sk98lin.o.
+Marvell Yukon Chipset
+CONFIG_SK98LIN_T1
+ This driver supports:
+
+ - 3Com 3C940 Gigabit LOM Ethernet Adapter
+ - 3Com 3C941 Gigabit LOM Ethernet Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+SysKonnect SK98xx Support
+CONFIG_SK98LIN_T2
+ This driver supports:
+
+ - SK-9821 Gigabit Ethernet Server Adapter (SK-NET GE-T)
+ - SK-9822 Gigabit Ethernet Server Adapter (SK-NET GE-T dual link)
+ - SK-9841 Gigabit Ethernet Server Adapter (SK-NET GE-LX)
+ - SK-9842 Gigabit Ethernet Server Adapter (SK-NET GE-LX dual link)
+ - SK-9843 Gigabit Ethernet Server Adapter (SK-NET GE-SX)
+ - SK-9844 Gigabit Ethernet Server Adapter (SK-NET GE-SX dual link)
+ - SK-9861 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition)
+ - SK-9862 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition dual link)
+ - SK-9871 Gigabit Ethernet Server Adapter (SK-NET GE-ZX)
+ - SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+SysKonnect SK98xx Support
+CONFIG_SK98LIN_T3
+ This driver supports:
+
+ - Allied Telesyn AT-2970SX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970LX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970TX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2971SX Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2971T Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970SX/2SC Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970LX/2SC Gigabit Ethernet Adapter
+ - Allied Telesyn AT-2970TX/2TX Gigabit Ethernet Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+Marvell Yukon Chipset
+CONFIG_SK98LIN_T4
+ This driver supports:
+
+ - Marvell RDK-8001 Adapter
+ - Marvell RDK-8002 Adapter
+ - Marvell RDK-8003 Adapter
+ - Marvell RDK-8004 Adapter
+ - Marvell RDK-8006 Adapter
+ - Marvell RDK-8007 Adapter
+ - Marvell RDK-8008 Adapter
+ - Marvell RDK-8009 Adapter
+ - Marvell RDK-8011 Adapter
+ - Marvell RDK-8012 Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+Marvell Yukon Chipset
+CONFIG_SK98LIN_T5
+ This driver supports:
+
+ - SK-9521 V2.0 10/100/1000Base-T Adapter
+ - SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter
+ - SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter
+ - SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+ - SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+ - SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter
+ - SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter
+ - SK-9521 10/100/1000Base-T Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+Marvell Yukon Chipset
+CONFIG_SK98LIN_T6
+ This driver supports:
+
+ - DGE-530T Gigabit Ethernet Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+Marvell Yukon Chipset
+CONFIG_SK98LIN_T7
+ This driver supports:
+
+ - Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+Marvell Yukon Chipset
+CONFIG_SK98LIN_T8
+ This driver supports:
+
+ - N-Way PCI-Bus Giga-Card 1000/100/10Mbps(L)
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+Marvell Yukon Chipset
+CONFIG_SK98LIN_T9
+ This driver supports:
+
+ - EG1032 v2 Instant Gigabit Network Adapter
+ - EG1064 v2 Instant Gigabit Network Adapter
+
+ Questions concerning this driver may be addressed to:
+ linux@syskonnect.de
+
+
Sun GEM support
CONFIG_SUNGEM
Support for the Sun GEM chip, aka Sun GigabitEthernet/P 2.0. See also
@@ -13126,6 +13642,15 @@
If unsure, say 'N'.
+MTD concatenating support
+CONFIG_MTD_CONCAT
+ Support for concatenating several MTD devices into a single
+ (virtual) one. This allows you to have -for example- a JFFS(2)
+ file system spanning multiple physical flash chips. If unsure,
+ say 'Y'.
+
+ If compiled as a module, it will be called mtdconcat.o.
+
ARM Firmware Suite flash layout / partition parsing
CONFIG_MTD_AFS_PARTS
The ARM Firmware Suite allows the user to divide flash devices into
@@ -13532,6 +14057,14 @@
D-Box 2 board. If you have one of these boards and would like to use
the flash chips on it, say 'Y'.
+CFI Flash devices mapped on IBM Redwood
+CONFIG_MTD_REDWOOD
+ This enables access routines for the flash chips on the IBM
+ Redwood board. If you have one of these boards and would like to
+ use the flash chips on it, say 'Y'.
+
+ If compiled as a module, it will be called redwood.o.
+
CFI Flash device mapped on the XScale IQ80310 board
CONFIG_MTD_IQ80310
This enables access routines for the flash chips on the Intel XScale
@@ -13664,6 +14197,20 @@
CONFIG_MTD_NAND_SPIA
If you had to ask, you don't have one. Say 'N'.
+SmartMediaCard on autronix autcpu12 board
+CONFIG_MTD_NAND_AUTCPU12
+ This enables the driver for the autronix autcpu12 board to
+ access the SmartMediaCard.
+
+ If compiled as a module, it will be called autcpu12.o.
+
+Support for Cirrus Logic EBD7312 evaluation board
+CONFIG_MTD_NAND_EDB7312
+ This enables the driver for the Cirrus Logic EBD7312 evaluation
+ board to access the onboard NAND Flash.
+
+ If compiled as a module, it will be called edb7312.o.
+
M-Systems Disk-On-Chip 1000 support
CONFIG_MTD_DOC1000
This provides an MTD device driver for the M-Systems DiskOnChip
@@ -17494,6 +18041,24 @@
Enable this option if you intend to use a HIL keyboard.
+HP System Device Controller support
+CONFIG_HP_SDC
+ This option enables supports for the the "System Device Controller",
+ an i8042 carrying microcode to manage a few miscellanous devices
+ on some Hewlett Packard systems. The SDC itself contains a 10ms
+ resolution timer/clock capable of delivering interrupts on periodic
+ and one-shot basis. The SDC may also be connected to a battery-backed
+ real-time clock, a basic audio waveform generator, and an HP-HIL
+ Master Link Controller serving up to seven input devices.
+
+ By itself this option is rather useless, but enabling it will
+ enable selection of drivers for the abovementioned devices.
+ It is, however, incompatible with the old, reliable HIL keyboard
+ driver, and the new HIL driver is experimental, so if you plan to
+ use a HIL keyboard as your primary keyboard, you may wish to
+ keep using that driver until the new HIL drivers have had more
+ testing.
+
Include IOP (IIfx/Quadra 9x0) ADB driver
CONFIG_ADB_IOP
The I/O Processor (IOP) is an Apple custom IC designed to provide
@@ -17814,6 +18379,19 @@
read <file:Documentation/modules.txt>. The module will be called
istallion.o.
+PDC software console support
+CONFIG_PDC_CONSOLE
+ Saying Y here will enable the software based PDC console to be
+ used as the system console. This is useful for machines in
+ which the hardware based console has not been written yet. The
+ following steps must be competed to use the PDC console:
+
+ 1. create the device entry (mknod /dev/ttyB0 c 60 0)
+ 2. Edit the /etc/inittab to start a getty listening on /dev/ttyB0
+ 3. Add device ttyB0 to /etc/securetty (if you want to log on as
+ root on this console.)
+ 4. Change the kernel command console parameter to: console=ttyB0
+
Microgate SyncLink adapter support
CONFIG_SYNCLINK
Provides support for the SyncLink ISA and PCI multiprotocol serial
@@ -18264,6 +18842,15 @@
it as a module, say M here and read <file:Documentation/modules.txt>.
The module will be called i2c-proc.o.
+Powermac Keywest I2C interface
+CONFIG_I2C_KEYWEST
+ This supports the use of the I2C interface in the combo-I/O
+ chip on recent Apple machines. Say Y if you have such a machine.
+
+ This driver is also available as a module. If you want to compile
+ it as a module, say M here and read Documentation/modules.txt.
+ The module will be called i2c-keywest.o.
+
Bus Mouse Support
CONFIG_BUSMOUSE
Say Y here if your machine has a bus mouse as opposed to a serial
@@ -18773,6 +19360,13 @@
selected, the module will be called i810.o. AGP support is required
for this driver to work.
+Intel 830M, 845G, 852GM, 855GM, 865G
+CONFIG_DRM_I830
+ Choose this option if you have a system that has Intel 830M, 845G,
+ 852GM, 855GM or 865G integrated graphics. If M is selected, the
+ module will be called i830.o. AGP support is required for this driver
+ to work.
+
Matrox G200/G400/G450
CONFIG_DRM_MGA
Choose this option if you have a Matrox G200, G400 or G450 graphics
@@ -18926,6 +19520,21 @@
If unsure, say N.
+Intel/AMD/VIA HW Random Number Generator support
+CONFIG_HW_RANDOM
+ This driver provides kernel-side support for the
+ Random Number Generator hardware found on Intel i8xx-based motherboards,
+ AMD 76x-based motherboards, and Via Nehemiah CPUs.
+
+ Provides a character driver, used to read() entropy data.
+
+ To compile this driver as a module ( = code which can be inserted in
+ and removed from the running kernel whenever you want), say M here
+ and read <file:Documentation/modules.txt>. The module will be called
+ hw_random.
+
+ If unsure, say N.
+
Power Management support
CONFIG_PM
"Power Management" means that parts of your computer are shut
@@ -21545,6 +22154,11 @@
This enables HiSax support for the HFC-S+, HFC-SP and HFC-PCMCIA
cards. This code is not finished yet.
+Formula-n enter:now PCI card (EXPERIMENTAL)
+CONFIG_HISAX_ENTERNOW_PCI
+ This enables HiSax support for the Formula-n enter:now PCI
+ ISDN card.
+
Am7930
CONFIG_HISAX_AMD7930
This enables HiSax support for the AMD7930 chips on some SPARCs.
@@ -22692,15 +23306,16 @@
want). The module is called ariadne.o. If you want to compile it as
a module, say M here and read <file:Documentation/modules.txt>.
-Ariadne II and X-Surf support
-CONFIG_ARIADNE2
- This driver is for the Village Tronic Ariadne II and the Individual
+Zorro NS8390-based Ethernet support
+CONFIG_ZORRO8390
+ This driver is for Zorro Ethernet cards using an NS8390-compatible
+ chipset, like the Village Tronic Ariadne II and the Individual
Computers X-Surf Ethernet cards. If you have such a card, say Y.
Otherwise, say N.
This driver is also available as a module ( = code which can be
inserted in and removed from the running kernel whenever you want).
- The module will be called ariadne2.o. If you want to compile it as
+ The module is called zorro8390.o. If you want to compile it as
a module, say M here and read <file:Documentation/modules.txt>.
A2065 support
@@ -24740,6 +25355,46 @@
Say Y if you want support for the ARM1020 processor.
Otherwise, say N.
+Disable I-Cache
+CONFIG_CPU_ICACHE_DISABLE
+ Say Y here to disable the processor instruction cache. Unless
+ you have a reason not to or are unsure, say N.
+
+Disable D-Cache
+CONFIG_CPU_DCACHE_DISABLE
+ Say Y here to disable the processor data cache. Unless
+ you have a reason not to or are unsure, say N.
+
+Force write through D-cache
+CONFIG_CPU_DCACHE_WRITETHROUGH
+ Say Y here to use the data cache in write-through mode. Unless you
+ specifically require this or are unsure, say N.
+
+Round robin I and D cache replacement algorithm
+CONFIG_CPU_CACHE_ROUND_ROBIN
+ Say Y here to use the predictable round-robin cache replacement
+ policy. Unless you specifically require this or are unsure, say N.
+
+Disable branch prediction
+CONFIG_CPU_BPREDICT_DISABLE
+ Say Y here to disable branch prediction. If unsure, say N.
+
+Compressed boot loader in ROM/flash
+CONFIG_ZBOOT_ROM
+ Say Y here if you intend to execute your compressed kernel image (zImage)
+ directly from ROM or flash. If unsure, say N.
+
+Compressed ROM boot loader base address
+CONFIG_ZBOOT_ROM_TEXT
+ The base address for zImage. Unless you have special requirements, you
+ should not change this value.
+
+Compressed ROM boot loader BSS address
+CONFIG_ZBOOT_ROM_BSS
+ The base address of 64KiB of read/write memory, which must be available
+ while the decompressor is running. Unless you have special requirements,
+ you should not change this value.
+
Support StrongARM SA-110 processor
CONFIG_CPU_SA110
The Intel StrongARM(R) SA-110 is a 32-bit microprocessor and
@@ -24899,6 +25554,19 @@
output to the second serial port on these devices. Saying N will
cause the debug messages to appear on the first serial port.
+Kernel log buffer length shift
+CONFIG_LOG_BUF_SHIFT
+ The kernel log buffer has a fixed size of :
+ 64 kB (2^16) on MULTIQUAD and IA64,
+ 128 kB (2^17) on S390
+ 32 kB (2^15) on SMP systems
+ 16 kB (2^14) on UP systems
+
+ You have the ability to change this size with this paramter which
+ fixes the bit shift of to get the buffer length (which must be a
+ power of 2). Eg: a value of 16 sets the buffer to 64 kB (2^16).
+ The default value of 0 uses standard values above.
+
Disable pgtable cache
CONFIG_NO_PGT_CACHE
Normally the kernel maintains a `quicklist' of preallocated
@@ -25255,6 +25923,44 @@
brave people. System crashes and other bad things are likely to occur if
you use this driver. If in doubt, select N.
+Tieman Voyager USB Braille display support (EXPERIMENTAL)
+CONFIG_USB_BRLVGER
+ Say Y here if you want to use the Voyager USB Braille display from
+ Tieman. See <file:Documentation/usb/brlvger.txt> for more
+ information.
+
+ This code is also available as a module ( = code which can be
+ inserted in and removed from the running kernel whenever you want).
+ The module will be called brlvger.o. If you want to compile it as
+ a module, say M here and read <file:Documentation/modules.txt>.
+
+KB Gear JamStudio tablet support
+CONFIG_USB_KBTAB
+ Say Y here if you want to use the USB version of the KB Gear
+ JamStudio tablet. Make sure to say Y to "Mouse support"
+ (CONFIG_INPUT_MOUSEDEV) and/or "Event interface support"
+ (CONFIG_INPUT_EVDEV) as well.
+
+ This driver is also available as a module ( = code which can be
+ inserted in and removed from the running kernel whenever you want).
+ The module will be called kbtab.o. If you want to compile it as a
+ module, say M here and read <file:Documentation/modules.txt>.
+
+USB Inside Out Edgeport Serial Driver (TI devices)
+CONFIG_USB_SERIAL_EDGEPORT_TI
+ Say Y here if you want to use any of the devices from Inside Out
+ Networks (Digi) that are not supported by the io_edgeport driver.
+ This includes the Edgeport/1 device.
+
+ This code is also available as a module ( = code which can be
+ inserted in and removed from the running kernel whenever you want).
+ The module will be called io_ti.o. If you want to compile it
+ as a module, say M here and read <file:Documentation/modules.txt>.
+
+USB Keyspan MPR Firmware
+CONFIG_USB_SERIAL_KEYSPAN_MPR
+ Say Y here to include firmware for the Keyspan MPR converter.
+
Winbond W83977AF IrDA Device Driver
CONFIG_WINBOND_FIR
Say Y here if you want to build IrDA support for the Winbond
@@ -26531,6 +27237,11 @@
best used in conjunction with the NMI watchdog so that spinlock
deadlocks are also debuggable.
+Additional run-time checks
+CONFIG_CHECKING
+ Enables some internal consistency checks for kernel debugging.
+ You should normally say N.
+
Read-write spinlock debugging
CONFIG_DEBUG_RWLOCK
If you say Y here then read-write lock processing will count how many
@@ -27204,6 +27915,12 @@
If unsure, say N.
+Hotplug firmware loading support (EXPERIMENTAL)
+CONFIG_FW_LOADER
+ This option is provided for the case where no in-kernel-tree modules require
+ hotplug firmware loading support, but a module built outside the kernel tree
+ does.
+
NatSemi SCx200 support
CONFIG_SCx200
This provides basic support for the National Semiconductor SCx200
@@ -27429,6 +28146,82 @@
kernel tree does. Such modules that use library CRC32 functions
require that you say M or Y here.
+Chassis LCD and LED support
+CONFIG_CHASSIS_LCD_LED
+ Say Y here if you want to enable support for the Heartbeat,
+ Disk/Network activities LEDs on some PA-RISC machines,
+ or support for the LCD that can be found on recent material.
+
+ This has nothing to do with LED State support for A, J and E class.
+
+ If unsure, say Y.
+
+VSC/GSC/HSC bus support
+CONFIG_GSC
+ The VSC, GSC and HSC busses were used from the earliest 700-series
+ workstations up to and including the C360/J2240 workstations. They
+ were also used in servers from the E-class to the K-class. They
+ are not found in B1000, C3000, J5000, A500, L1000, N4000 and upwards.
+ If in doubt, say "Y".
+
+Wax I/O support
+CONFIG_GSC_WAX
+ Say Y here to support the Wax multifunction chip found in some
+ older systems, including B/C/D/R class and 715/64, 715/80 and
+ 715/100. Wax includes an EISA adapter, a serial port (not always
+ used), a HIL interface chip and is also known to be used as the
+ GSC bridge for an X.25 GSC card.
+
+GSCtoPCI/Dino PCI support
+CONFIG_GSC_DINO
+ Say Y here to support the Dino & Cujo GSC to PCI bridges found in
+ machines from the B132 to the C360, the J2240 and the A180. Some
+ GSC/HSC cards (eg gigabit & dual 100 Mbit Ethernet) have a Dino on
+ the card, and you also need to say Y here if you have such a card.
+ Note that Dino also supplies one of the serial ports on certain
+ machines. If in doubt, say Y.
+
+HPET timers
+CONFIG_HPET_TIMER
+ Use the IA-PC HPET (High Precision Event Timer) to manage
+ time in preference to the PIT and RTC, if a HPET is
+ present. The HPET provides a stable time base on SMP
+ systems, unlike the RTC, but it is more expensive to access,
+ as it is off-chip. You can find the HPET spec at
+ <http://www.intel.com/labs/platcomp/hpet/hpetspec.htm>.
+
+ If unsure, say Y.
+
+IOMMU support
+CONFIG_GART_IOMMU
+ Support the K8 IOMMU. Needed to run systems with more than 4GB of memory
+ properly with 32-bit PCI devices that do not support DAC (Double Address
+ Cycle). The IOMMU can be turned off at runtime with the iommu=off parameter.
+ Normally the kernel will take the right choice by itself.
+ If unsure say Y
+
+Debug __init statements
+CONFIG_INIT_DEBUG
+ Fill __init and __initdata at the end of boot. This helps debugging
+ invalid uses of __init and __initdata after initialization.
+
+Force IOMMU to on
+CONFIG_IOMMU_DEBUG
+ Force the IOMMU to on even when you have less than 4GB of memory and add
+ debugging code.
+ Can be disabled at boot time with iommu=noforce.
+
+IOMMU leak tracing
+CONFIG_IOMMU_LEAK
+ Add a simple leak tracer to the IOMMU code. This is useful when you
+ are debugging a buggy device driver that leaks IOMMU mappings.
+
+pSeries Hypervisor Virtual Console support
+CONFIG_HVC_CONSOLE
+ pSeries machines when partitioned support a hypervisor virtual
+ console. This driver allows each pSeries partition to have a console
+ which is accessed via the HMC.
+
CONFIG_CRYPTO
This option provides the core Cryptographic API.
@@ -27511,6 +28304,12 @@
The AES specifies three key sizes: 128, 192 and 256 bits
See http://csrc.nist.gov/encryption/aes/ for more information.
+
+CONFIG_CRYPTO_CAST5
+ CAST5 (CAST-128) cipher algorithm.
+
+ The CAST5 encryption algorithm (synonymous with CAST-128) is
+ described in RFC2144.
CONFIG_CRYPTO_DEFLATE
This is the Deflate algorithm (RFC1951), specified for use in
diff -Nru a/Makefile b/Makefile
--- a/Makefile Wed Oct 8 09:06:26 2003
+++ b/Makefile Wed Oct 8 09:06:26 2003
@@ -93,6 +93,7 @@
CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes -Wno-trigraphs -O2 \
-fno-strict-aliasing -fno-common
+CFLAGS += -g
ifndef CONFIG_FRAME_POINTER
CFLAGS += -fomit-frame-pointer
endif
@@ -305,8 +306,7 @@
$(CONFIG_SHELL) scripts/Configure -d arch/$(ARCH)/config.in
xconfig: symlinks
- $(MAKE) -C scripts kconfig.tk
- wish -f scripts/kconfig.tk
+ @echo -e "***\n* Sorry, xconfig is broken; use \"make menuconfig\" instead.\n***"
menuconfig: include/linux/version.h symlinks
$(MAKE) -C scripts/lxdialog all
diff -Nru a/arch/ia64/config.in b/arch/ia64/config.in
--- a/arch/ia64/config.in Wed Oct 8 09:06:27 2003
+++ b/arch/ia64/config.in Wed Oct 8 09:06:27 2003
@@ -84,6 +84,32 @@
define_bool CONFIG_KCORE_ELF y # On IA-64, we always want an ELF /proc/kcore.
+define_int CONFIG_FORCE_MAX_ZONEORDER 19
+
+bool 'IA-64 Huge TLB Page Support' CONFIG_HUGETLB_PAGE
+
+if [ "$CONFIG_HUGETLB_PAGE" = "y" ]; then
+ if [ "$CONFIG_MCKINLEY" = "y" ]; then
+ choice ' IA-64 Huge TLB Page Size' \
+ "4GB CONFIG_HUGETLB_PAGE_SIZE_4GB \
+ 1GB CONFIG_HUGETLB_PAGE_SIZE_1GB \
+ 256MB CONFIG_HUGETLB_PAGE_SIZE_256MB \
+ 64MB CONFIG_HUGETLB_PAGE_SIZE_64MB \
+ 16MB CONFIG_HUGETLB_PAGE_SIZE_16MB \
+ 4MB CONFIG_HUGETLB_PAGE_SIZE_4MB \
+ 1MB CONFIG_HUGETLB_PAGE_SIZE_1MB \
+ 256KB CONFIG_HUGETLB_PAGE_SIZE_256KB" 16MB
+ else
+ choice ' IA-64 Huge TLB Page Size' \
+ "256MB CONFIG_HUGETLB_PAGE_SIZE_256MB \
+ 64MB CONFIG_HUGETLB_PAGE_SIZE_64MB \
+ 16MB CONFIG_HUGETLB_PAGE_SIZE_16MB \
+ 4MB CONFIG_HUGETLB_PAGE_SIZE_4MB \
+ 1MB CONFIG_HUGETLB_PAGE_SIZE_1MB \
+ 256KB CONFIG_HUGETLB_PAGE_SIZE_256KB" 16MB
+ fi
+fi
+
bool 'Use PAL_HALT_LIGHT in idle loop' CONFIG_IA64_PAL_IDLE
bool 'SMP support' CONFIG_SMP
if [ "$CONFIG_SMP" = "y" ]; then
diff -Nru a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
--- a/arch/ia64/hp/common/sba_iommu.c Wed Oct 8 09:06:27 2003
+++ b/arch/ia64/hp/common/sba_iommu.c Wed Oct 8 09:06:27 2003
@@ -133,6 +133,7 @@
#define ZX1_IOC_ID ((PCI_DEVICE_ID_HP_ZX1_IOC << 16) | PCI_VENDOR_ID_HP)
#define REO_IOC_ID ((PCI_DEVICE_ID_HP_REO_IOC << 16) | PCI_VENDOR_ID_HP)
+#define SX1000_IOC_ID ((PCI_DEVICE_ID_HP_SX1000_IOC << 16) | PCI_VENDOR_ID_HP)
#define ZX1_IOC_OFFSET 0x1000 /* ACPI reports SBA, we want IOC */
@@ -1636,6 +1637,7 @@
static struct ioc_iommu ioc_iommu_info[] __initdata = {
{ ZX1_IOC_ID, "zx1", ioc_zx1_init },
{ REO_IOC_ID, "REO" },
+ { SX1000_IOC_ID, "sx1000" },
};
static struct ioc * __init
diff -Nru a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
--- a/arch/ia64/kernel/acpi.c Wed Oct 8 09:06:27 2003
+++ b/arch/ia64/kernel/acpi.c Wed Oct 8 09:06:27 2003
@@ -820,4 +820,22 @@
return gsi_to_vector(irq);
}
+int
+acpi_register_irq (u32 gsi, u32 polarity, u32 trigger)
+{
+ int vector = 0;
+
+ if (has_8259 && gsi < 16)
+ return isa_irq_to_vector(gsi);
+
+ if (!iosapic_register_intr)
+ return 0;
+
+ /* Turn it on */
+ vector = iosapic_register_intr(gsi,
+ (polarity == ACPI_ACTIVE_HIGH) ? IOSAPIC_POL_HIGH : IOSAPIC_POL_LOW,
+ (trigger == ACPI_EDGE_SENSITIVE) ? IOSAPIC_EDGE : IOSAPIC_LEVEL);
+ return vector;
+}
+
#endif /* CONFIG_ACPI_BOOT */
diff -Nru a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S
--- a/arch/ia64/kernel/ivt.S Wed Oct 8 09:06:26 2003
+++ b/arch/ia64/kernel/ivt.S Wed Oct 8 09:06:26 2003
@@ -118,6 +118,10 @@
* - the faulting virtual address has no L1, L2, or L3 mapping
*/
mov r16=cr.ifa // get address that caused the TLB miss
+#ifdef CONFIG_HUGETLB_PAGE
+ movl r18=PAGE_SHIFT
+ mov r25=cr.itir
+#endif
;;
rsm psr.dt // use physical addressing for data
mov r31=pr // save the predicate registers
@@ -125,8 +129,18 @@
shl r21=r16,3 // shift bit 60 into sign bit
shr.u r17=r16,61 // get the region number into r17
;;
+ shr r22=r21,3
+#ifdef CONFIG_HUGETLB_PAGE
+ extr.u r26=r25,2,6
+ ;;
+ cmp.eq p8,p0=HPAGE_SHIFT,r26
+ ;;
+(p8) dep r25=r18,r25,2,6
+(p8) shr r22=r22,HPAGE_SHIFT-PAGE_SHIFT
+#endif
+ ;;
cmp.eq p6,p7=5,r17 // is IFA pointing into to region 5?
- shr.u r18=r16,PGDIR_SHIFT // get bits 33-63 of the faulting address
+ shr.u r18=r22,PGDIR_SHIFT // get bits 33-63 of the faulting address
;;
(p7) dep r17=r17,r19,(PAGE_SHIFT-3),3 // put region number bits in place
srlz.d // ensure "rsm psr.dt" has taken effect
@@ -137,7 +151,7 @@
(p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=PTA + IFA(33,42)*8
(p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=PTA + (((IFA(61,63) << 7) | IFA(33,39))*8)
cmp.eq p7,p6=0,r21 // unused address bits all zeroes?
- shr.u r18=r16,PMD_SHIFT // shift L2 index into position
+ shr.u r18=r22,PMD_SHIFT // shift L2 index into position
;;
ld8 r17=[r17] // fetch the L1 entry (may be 0)
;;
@@ -145,7 +159,7 @@
dep r17=r18,r17,3,(PAGE_SHIFT-3) // compute address of L2 page table entry
;;
(p7) ld8 r20=[r17] // fetch the L2 entry (may be 0)
- shr.u r19=r16,PAGE_SHIFT // shift L3 index into position
+ shr.u r19=r22,PAGE_SHIFT // shift L3 index into position
;;
(p7) cmp.eq.or.andcm p6,p7=r20,r0 // was L2 entry NULL?
dep r21=r19,r20,3,(PAGE_SHIFT-3) // compute address of L3 page table entry
@@ -163,6 +177,10 @@
(p11) itc.d r18 // insert the data TLB entry
(p6) br.cond.spnt.many page_fault // handle bad address/page not present (page fault)
mov cr.ifa=r22
+
+#ifdef CONFIG_HUGETLB_PAGE
+(p8) mov cr.itir=r25 // change to default page-size for VHPT
+#endif
/*
* Now compute and insert the TLB entry for the virtual page table. We never
diff -Nru a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
--- a/arch/ia64/kernel/setup.c Wed Oct 8 09:06:26 2003
+++ b/arch/ia64/kernel/setup.c Wed Oct 8 09:06:26 2003
@@ -46,6 +46,7 @@
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
#include <asm/smp.h>
+#include <asm/tlb.h>
#ifdef CONFIG_BLK_DEV_RAM
# include <linux/blk.h>
@@ -64,6 +65,7 @@
struct cpuinfo_ia64 *_cpu_data[NR_CPUS];
#else
struct cpuinfo_ia64 _cpu_data[NR_CPUS] __attribute__ ((section ("__special_page_section")));
+ mmu_gather_t mmu_gathers[NR_CPUS];
#endif
unsigned long ia64_cycles_per_usec;
@@ -659,6 +661,7 @@
_cpu_data[cpu]->cpu_data[smp_processor_id()] = my_cpu_data;
#else
my_cpu_data = cpu_data(smp_processor_id());
+ my_cpu_data->mmu_gathers = &mmu_gathers[smp_processor_id()];
#endif
/*
diff -Nru a/arch/ia64/mm/Makefile b/arch/ia64/mm/Makefile
--- a/arch/ia64/mm/Makefile Wed Oct 8 09:06:26 2003
+++ b/arch/ia64/mm/Makefile Wed Oct 8 09:06:26 2003
@@ -14,5 +14,6 @@
obj-y := init.o fault.o tlb.o extable.o
obj-$(CONFIG_NUMA) += numa.o
obj-$(CONFIG_DISCONTIGMEM) += discontig.o
+obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
include $(TOPDIR)/Rules.make
diff -Nru a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
--- a/arch/ia64/mm/init.c Wed Oct 8 09:06:27 2003
+++ b/arch/ia64/mm/init.c Wed Oct 8 09:06:27 2003
@@ -28,9 +28,6 @@
#include <asm/sal.h>
#include <asm/system.h>
#include <asm/uaccess.h>
-#include <asm/tlb.h>
-
-mmu_gather_t mmu_gathers[NR_CPUS];
/* References to section boundaries: */
extern char _stext, _etext, _edata, __init_begin, __init_end;
diff -Nru a/drivers/char/Config.in b/drivers/char/Config.in
--- a/drivers/char/Config.in Wed Oct 8 09:06:26 2003
+++ b/drivers/char/Config.in Wed Oct 8 09:06:26 2003
@@ -24,6 +24,9 @@
tristate ' Atomwide serial port support' CONFIG_ATOMWIDE_SERIAL
tristate ' Dual serial port support' CONFIG_DUALSP_SERIAL
fi
+ if [ "$CONFIG_ACPI" = "y" ]; then
+ bool ' Support for serial ports defined in ACPI namespace' CONFIG_SERIAL_ACPI
+ fi
fi
dep_mbool 'Extended dumb serial driver options' CONFIG_SERIAL_EXTENDED $CONFIG_SERIAL
if [ "$CONFIG_SERIAL_EXTENDED" = "y" ]; then
@@ -327,6 +330,7 @@
bool ' NVIDIA chipset support' CONFIG_AGP_NVIDIA
fi
if [ "$CONFIG_IA64" = "y" ]; then
+ bool ' Intel 460GX support' CONFIG_AGP_I460
bool ' HP ZX1 AGP support' CONFIG_AGP_HP_ZX1
fi
bool ' ATI IGP chipset support' CONFIG_AGP_ATI
diff -Nru a/drivers/char/Makefile b/drivers/char/Makefile
--- a/drivers/char/Makefile Wed Oct 8 09:06:27 2003
+++ b/drivers/char/Makefile Wed Oct 8 09:06:27 2003
@@ -182,6 +182,7 @@
obj-$(CONFIG_HIL) += hp_keyb.o
obj-$(CONFIG_MAGIC_SYSRQ) += sysrq.o
obj-$(CONFIG_ATARI_DSP56K) += dsp56k.o
+obj-$(CONFIG_HP_SIMSERIAL) += simserial.o
obj-$(CONFIG_ROCKETPORT) += rocket.o
obj-$(CONFIG_MOXA_SMARTIO) += mxser.o
obj-$(CONFIG_MOXA_INTELLIO) += moxa.o
diff -Nru a/drivers/char/agp/agp.h b/drivers/char/agp/agp.h
--- a/drivers/char/agp/agp.h Wed Oct 8 09:06:27 2003
+++ b/drivers/char/agp/agp.h Wed Oct 8 09:06:27 2003
@@ -256,6 +256,9 @@
#ifndef PCI_DEVICE_ID_INTEL_82443GX_1
#define PCI_DEVICE_ID_INTEL_82443GX_1 0x71a1
#endif
+#ifndef PCI_DEVICE_ID_INTEL_460GX
+#define PCI_DEVICE_ID_INTEL_460GX 0x84ea
+#endif
#ifndef PCI_DEVICE_ID_AMD_IRONGATE_0
#define PCI_DEVICE_ID_AMD_IRONGATE_0 0x7006
#endif
@@ -331,6 +334,14 @@
#define INTEL_NBXCFG 0x50
#define INTEL_ERRSTS 0x91
+/* Intel 460GX Registers */
+#define INTEL_I460_APBASE 0x10
+#define INTEL_I460_BAPBASE 0x98
+#define INTEL_I460_GXBCTL 0xa0
+#define INTEL_I460_AGPSIZ 0xa2
+#define INTEL_I460_ATTBASE 0xfe200000
+#define INTEL_I460_GATT_VALID (1UL << 24)
+#define INTEL_I460_GATT_COHERENT (1UL << 25)
/* Intel 855GM/852GM registers */
#define I855_GMCH_CTRL 0x52
#define I855_GMCH_ENABLED 0x4
@@ -500,14 +511,16 @@
#define NVIDIA_3_APBASE 0x50
#define NVIDIA_3_APLIMIT 0x54
-/* HP ZX1 SBA registers */
-#define HP_ZX1_CTRL 0x200
+/* HP ZX1 IOC registers */
#define HP_ZX1_IBASE 0x300
#define HP_ZX1_IMASK 0x308
#define HP_ZX1_PCOM 0x310
#define HP_ZX1_TCNFG 0x318
#define HP_ZX1_PDIR_BASE 0x320
-#define HP_ZX1_CACHE_FLUSH 0x428
+
+/* HP ZX1 LBA registers */
+#define HP_ZX1_AGP_STATUS 0x64
+#define HP_ZX1_AGP_COMMAND 0x68
/* ATI register */
#define ATI_APBASE 0x10
diff -Nru a/drivers/char/agp/agpgart_be.c b/drivers/char/agp/agpgart_be.c
--- a/drivers/char/agp/agpgart_be.c Wed Oct 8 09:06:26 2003
+++ b/drivers/char/agp/agpgart_be.c Wed Oct 8 09:06:26 2003
@@ -2479,6 +2479,37 @@
}
+static int intel_7505_configure(void)
+{
+ u32 temp;
+ u16 temp2;
+ aper_size_info_8 *current_size;
+
+ current_size = A_SIZE_8(agp_bridge.current_size);
+
+ /* aperture size */
+ pci_write_config_byte(agp_bridge.dev, INTEL_APSIZE,
+ current_size->size_value);
+
+ /* address to map to */
+ pci_read_config_dword(agp_bridge.dev, INTEL_APBASE, &temp);
+ agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
+
+ /* attbase - aperture base */
+ pci_write_config_dword(agp_bridge.dev, INTEL_ATTBASE,
+ agp_bridge.gatt_bus_addr);
+
+ /* agpctrl */
+ pci_write_config_dword(agp_bridge.dev, INTEL_AGPCTRL, 0x0000);
+
+ /* mcgcfg */
+ pci_read_config_word(agp_bridge.dev, INTEL_I7505_MCHCFG, &temp2);
+ pci_write_config_word(agp_bridge.dev, INTEL_I7505_MCHCFG,
+ temp2 | (1 << 9));
+ return 0;
+}
+
+
static unsigned long intel_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
@@ -2788,6 +2819,38 @@
(void) pdev; /* unused */
}
+static int __init intel_7505_setup (struct pci_dev *pdev)
+{
+ agp_bridge.masks = intel_generic_masks;
+ agp_bridge.aperture_sizes = (void *) intel_8xx_sizes;
+ agp_bridge.size_type = U8_APER_SIZE;
+ agp_bridge.num_aperture_sizes = 7;
+ agp_bridge.dev_private_data = NULL;
+ agp_bridge.needs_scratch_page = FALSE;
+ agp_bridge.configure = intel_7505_configure;
+ agp_bridge.fetch_size = intel_8xx_fetch_size;
+ agp_bridge.cleanup = intel_8xx_cleanup;
+ agp_bridge.tlb_flush = intel_8xx_tlbflush;
+ agp_bridge.mask_memory = intel_mask_memory;
+ agp_bridge.agp_enable = agp_generic_agp_enable;
+ agp_bridge.cache_flush = global_cache_flush;
+ agp_bridge.create_gatt_table = agp_generic_create_gatt_table;
+ agp_bridge.free_gatt_table = agp_generic_free_gatt_table;
+ agp_bridge.insert_memory = agp_generic_insert_memory;
+ agp_bridge.remove_memory = agp_generic_remove_memory;
+ agp_bridge.alloc_by_type = agp_generic_alloc_by_type;
+ agp_bridge.free_by_type = agp_generic_free_by_type;
+ agp_bridge.agp_alloc_page = agp_generic_alloc_page;
+ agp_bridge.agp_destroy_page = agp_generic_destroy_page;
+ agp_bridge.suspend = agp_generic_suspend;
+ agp_bridge.resume = agp_generic_resume;
+ agp_bridge.cant_use_aperture = 0;
+
+ return 0;
+
+ (void) pdev; /* unused */
+}
+
#endif /* CONFIG_AGP_INTEL */
#ifdef CONFIG_AGP_VIA
@@ -5296,6 +5359,412 @@
#endif /* CONFIG_AGP_HP_ZX1 */
+#ifdef CONFIG_AGP_ATI
+static aper_size_info_lvl2 ati_generic_sizes[7] =
+{
+ {2048, 524288, 0x0000000c},
+ {1024, 262144, 0x0000000a},
+ {512, 131072, 0x00000008},
+ {256, 65536, 0x00000006},
+ {128, 32768, 0x00000004},
+ {64, 16384, 0x00000002},
+ {32, 8192, 0x00000000}
+};
+
+static gatt_mask ati_generic_masks[] =
+{
+ {0x00000001, 0}
+};
+
+typedef struct _ati_page_map {
+ unsigned long *real;
+ unsigned long *remapped;
+} ati_page_map;
+
+static struct _ati_generic_private {
+ volatile u8 *registers;
+ ati_page_map **gatt_pages;
+ int num_tables;
+} ati_generic_private;
+
+static int ati_create_page_map(ati_page_map *page_map)
+{
+ int i, err = 0;
+
+ page_map->real = (unsigned long *) __get_free_page(GFP_KERNEL);
+ if (page_map->real == NULL)
+ return -ENOMEM;
+
+ SetPageReserved(virt_to_page(page_map->real));
+ /*
+ * fredi - WARNING: added looking at the changes during
+ * 2.4.20. I dont know if it's needed though.
+ */
+#ifdef CONFIG_X86
+ err = change_page_attr(virt_to_page(page_map->real), 1, PAGE_KERNEL_NOCACHE);
+#endif
+ CACHE_FLUSH();
+ page_map->remapped = ioremap_nocache(virt_to_phys(page_map->real),
+ PAGE_SIZE);
+ if (page_map->remapped == NULL || err) {
+ ClearPageReserved(virt_to_page(page_map->real));
+ free_page((unsigned long) page_map->real);
+ page_map->real = NULL;
+ return -ENOMEM;
+ }
+ CACHE_FLUSH();
+
+ for(i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++)
+ page_map->remapped[i] = agp_bridge.scratch_page;
+
+ return 0;
+}
+
+static void ati_free_page_map(ati_page_map *page_map)
+{
+ /*
+ * fredi - WARNING: added looking at the changes during
+ * 2.4.20. I dont know if it's needed though.
+ */
+#ifdef CONFIG_X86
+ change_page_attr(virt_to_page(page_map->real), 1, PAGE_KERNEL);
+#endif
+ iounmap(page_map->remapped);
+ ClearPageReserved(virt_to_page(page_map->real));
+ free_page((unsigned long) page_map->real);
+}
+
+static void ati_free_gatt_pages(void)
+{
+ int i;
+ ati_page_map **tables;
+ ati_page_map *entry;
+
+ tables = ati_generic_private.gatt_pages;
+ for(i = 0; i < ati_generic_private.num_tables; i++) {
+ entry = tables[i];
+ if (entry != NULL) {
+ if (entry->real != NULL)
+ ati_free_page_map(entry);
+ kfree(entry);
+ }
+ }
+ kfree(tables);
+}
+
+static int ati_create_gatt_pages(int nr_tables)
+{
+ ati_page_map **tables;
+ ati_page_map *entry;
+ int retval = 0;
+ int i;
+
+ tables = kmalloc((nr_tables + 1) * sizeof(ati_page_map *),
+ GFP_KERNEL);
+ if (tables == NULL)
+ return -ENOMEM;
+
+ memset(tables, 0, sizeof(ati_page_map *) * (nr_tables + 1));
+ for (i = 0; i < nr_tables; i++) {
+ entry = kmalloc(sizeof(ati_page_map), GFP_KERNEL);
+ if (entry == NULL) {
+ retval = -ENOMEM;
+ break;
+ }
+ memset(entry, 0, sizeof(ati_page_map));
+ tables[i] = entry;
+ retval = ati_create_page_map(entry);
+ if (retval != 0) break;
+ }
+ ati_generic_private.num_tables = nr_tables;
+ ati_generic_private.gatt_pages = tables;
+
+ if (retval != 0) ati_free_gatt_pages();
+
+ return retval;
+}
+
+/*
+ *Since we don't need contigious memory we just try
+ * to get the gatt table once
+ */
+
+#define GET_PAGE_DIR_OFF(addr) (addr >> 22)
+#define GET_PAGE_DIR_IDX(addr) (GET_PAGE_DIR_OFF(addr) - \
+ GET_PAGE_DIR_OFF(agp_bridge.gart_bus_addr))
+#define GET_GATT_OFF(addr) ((addr & 0x003ff000) >> 12)
+#undef GET_GATT(addr)
+#define GET_GATT(addr) (ati_generic_private.gatt_pages[\
+ GET_PAGE_DIR_IDX(addr)]->remapped)
+
+static int ati_insert_memory(agp_memory * mem,
+ off_t pg_start, int type)
+{
+ int i, j, num_entries;
+ unsigned long *cur_gatt;
+ unsigned long addr;
+
+ num_entries = A_SIZE_LVL2(agp_bridge.current_size)->num_entries;
+
+ if (type != 0 || mem->type != 0)
+ return -EINVAL;
+
+ if ((pg_start + mem->page_count) > num_entries)
+ return -EINVAL;
+
+ j = pg_start;
+ while (j < (pg_start + mem->page_count)) {
+ addr = (j * PAGE_SIZE) + agp_bridge.gart_bus_addr;
+ cur_gatt = GET_GATT(addr);
+ if (!PGE_EMPTY(cur_gatt[GET_GATT_OFF(addr)]))
+ return -EBUSY;
+ j++;
+ }
+
+ if (mem->is_flushed == FALSE) {
+ CACHE_FLUSH();
+ mem->is_flushed = TRUE;
+ }
+
+ for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
+ addr = (j * PAGE_SIZE) + agp_bridge.gart_bus_addr;
+ cur_gatt = GET_GATT(addr);
+ cur_gatt[GET_GATT_OFF(addr)] =
+ agp_bridge.mask_memory(mem->memory[i], mem->type);
+ }
+ agp_bridge.tlb_flush(mem);
+ return 0;
+}
+
+static int ati_remove_memory(agp_memory * mem, off_t pg_start,
+ int type)
+{
+ int i;
+ unsigned long *cur_gatt;
+ unsigned long addr;
+
+ if (type != 0 || mem->type != 0) {
+ return -EINVAL;
+ }
+ for (i = pg_start; i < (mem->page_count + pg_start); i++) {
+ addr = (i * PAGE_SIZE) + agp_bridge.gart_bus_addr;
+ cur_gatt = GET_GATT(addr);
+ cur_gatt[GET_GATT_OFF(addr)] =
+ (unsigned long) agp_bridge.scratch_page;
+ }
+
+ agp_bridge.tlb_flush(mem);
+ return 0;
+}
+
+static int ati_create_gatt_table(void)
+{
+ aper_size_info_lvl2 *value;
+ ati_page_map page_dir;
+ unsigned long addr;
+ int retval;
+ u32 temp;
+ int i;
+ aper_size_info_lvl2 *current_size;
+
+ value = A_SIZE_LVL2(agp_bridge.current_size);
+ retval = ati_create_page_map(&page_dir);
+ if (retval != 0)
+ return retval;
+
+ retval = ati_create_gatt_pages(value->num_entries / 1024);
+ if (retval != 0) {
+ ati_free_page_map(&page_dir);
+ return retval;
+ }
+
+ agp_bridge.gatt_table_real = (u32 *)page_dir.real;
+ agp_bridge.gatt_table = (u32 *)page_dir.remapped;
+ agp_bridge.gatt_bus_addr = virt_to_bus(page_dir.real);
+
+ /* Write out the size register */
+ current_size = A_SIZE_LVL2(agp_bridge.current_size);
+
+ if ((agp_bridge.dev->device == PCI_DEVICE_ID_ATI_RS100) ||
+ (agp_bridge.dev->device == PCI_DEVICE_ID_ATI_RS200) ||
+ (agp_bridge.dev->device == PCI_DEVICE_ID_ATI_RS250)) {
+ pci_read_config_dword(agp_bridge.dev, ATI_RS100_APSIZE, &temp);
+ temp = (((temp & ~(0x0000000e)) | current_size->size_value)
+ | 0x00000001);
+ pci_write_config_dword(agp_bridge.dev, ATI_RS100_APSIZE, temp);
+ pci_read_config_dword(agp_bridge.dev, ATI_RS100_APSIZE, &temp);
+ } else {
+ pci_read_config_dword(agp_bridge.dev, ATI_RS300_APSIZE, &temp);
+ temp = (((temp & ~(0x0000000e)) | current_size->size_value)
+ | 0x00000001);
+ pci_write_config_dword(agp_bridge.dev, ATI_RS300_APSIZE, temp);
+ pci_read_config_dword(agp_bridge.dev, ATI_RS300_APSIZE, &temp);
+ }
+
+ /*
+ * Get the address for the gart region.
+ * This is a bus address even on the alpha, b/c its
+ * used to program the agp master not the cpu
+ */
+ pci_read_config_dword(agp_bridge.dev, ATI_APBASE, &temp);
+ addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
+ agp_bridge.gart_bus_addr = addr;
+
+ /* Calculate the agp offset */
+ for(i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
+ page_dir.remapped[GET_PAGE_DIR_OFF(addr)] =
+ virt_to_bus(ati_generic_private.gatt_pages[i]->real);
+ page_dir.remapped[GET_PAGE_DIR_OFF(addr)] |= 0x00000001;
+ }
+
+ return 0;
+}
+
+static int ati_free_gatt_table(void)
+{
+ ati_page_map page_dir;
+
+ page_dir.real = (unsigned long *)agp_bridge.gatt_table_real;
+ page_dir.remapped = (unsigned long *)agp_bridge.gatt_table;
+
+ ati_free_gatt_pages();
+ ati_free_page_map(&page_dir);
+ return 0;
+}
+
+static int ati_fetch_size(void)
+{
+ int i;
+ u32 temp;
+ aper_size_info_lvl2 *values;
+
+ if ((agp_bridge.dev->device == PCI_DEVICE_ID_ATI_RS100) ||
+ (agp_bridge.dev->device == PCI_DEVICE_ID_ATI_RS200) ||
+ (agp_bridge.dev->device == PCI_DEVICE_ID_ATI_RS250)) {
+ pci_read_config_dword(agp_bridge.dev, ATI_RS100_APSIZE, &temp);
+ } else {
+ pci_read_config_dword(agp_bridge.dev, ATI_RS300_APSIZE, &temp);
+ }
+
+ temp = (temp & 0x0000000e);
+ values = A_SIZE_LVL2(agp_bridge.aperture_sizes);
+ for (i = 0; i < agp_bridge.num_aperture_sizes; i++) {
+ if (temp == values[i].size_value) {
+ agp_bridge.previous_size =
+ agp_bridge.current_size = (void *) (values + i);
+
+ agp_bridge.aperture_size_idx = i;
+ return values[i].size;
+ }
+ }
+
+ return 0;
+}
+
+static int ati_configure(void)
+{
+ u32 temp;
+
+ /* Get the memory mapped registers */
+ pci_read_config_dword(agp_bridge.dev, ATI_GART_MMBASE_ADDR, &temp);
+ temp = (temp & 0xfffff000);
+ ati_generic_private.registers = (volatile u8 *) ioremap(temp, 4096);
+
+ if ((agp_bridge.dev->device == PCI_DEVICE_ID_ATI_RS100) ||
+ (agp_bridge.dev->device == PCI_DEVICE_ID_ATI_RS200) ||
+ (agp_bridge.dev->device == PCI_DEVICE_ID_ATI_RS250)) {
+ pci_write_config_dword(agp_bridge.dev, ATI_RS100_IG_AGPMODE, 0x20000);
+ } else {
+ pci_write_config_dword(agp_bridge.dev, ATI_RS300_IG_AGPMODE, 0x20000);
+ }
+
+ /* address to map too */
+ /*
+ pci_read_config_dword(agp_bridge.dev, ATI_APBASE, &temp);
+ agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
+ printk(KERN_INFO "IGP320 gart_bus_addr: %x\n", agp_bridge.gart_bus_addr);
+ */
+ OUTREG32(ati_generic_private.registers, ATI_GART_FEATURE_ID, 0x60000);
+
+ /* SIGNALED_SYSTEM_ERROR @ NB_STATUS */
+ pci_read_config_dword(agp_bridge.dev, 4, &temp);
+ pci_write_config_dword(agp_bridge.dev, 4, temp | (1<<14));
+
+ /* Write out the address of the gatt table */
+ OUTREG32(ati_generic_private.registers, ATI_GART_BASE,
+ agp_bridge.gatt_bus_addr);
+
+ /* Flush the tlb */
+ OUTREG32(ati_generic_private.registers, ATI_GART_CACHE_CNTRL, 1);
+ return 0;
+}
+
+static void ati_cleanup(void)
+{
+ aper_size_info_lvl2 *previous_size;
+ u32 temp;
+
+ previous_size = A_SIZE_LVL2(agp_bridge.previous_size);
+
+ /* Write back the previous size and disable gart translation */
+ if ((agp_bridge.dev->device == PCI_DEVICE_ID_ATI_RS100) ||
+ (agp_bridge.dev->device == PCI_DEVICE_ID_ATI_RS200) ||
+ (agp_bridge.dev->device == PCI_DEVICE_ID_ATI_RS250)) {
+ pci_read_config_dword(agp_bridge.dev, ATI_RS100_APSIZE, &temp);
+ temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
+ pci_write_config_dword(agp_bridge.dev, ATI_RS100_APSIZE, temp);
+ } else {
+ pci_read_config_dword(agp_bridge.dev, ATI_RS300_APSIZE, &temp);
+ temp = ((temp & ~(0x0000000f)) | previous_size->size_value);
+ pci_write_config_dword(agp_bridge.dev, ATI_RS300_APSIZE, temp);
+ }
+ iounmap((void *) ati_generic_private.registers);
+}
+
+static void ati_tlbflush(agp_memory * mem)
+{
+ OUTREG32(ati_generic_private.registers, ATI_GART_CACHE_CNTRL, 1);
+}
+
+static unsigned long ati_mask_memory(unsigned long addr, int type)
+{
+ /* Memory type is ignored */
+ return addr | agp_bridge.masks[0].mask;
+}
+
+static int __init ati_generic_setup (struct pci_dev *pdev)
+{
+ agp_bridge.masks = ati_generic_masks;
+ agp_bridge.aperture_sizes = (void *) ati_generic_sizes;
+ agp_bridge.size_type = LVL2_APER_SIZE;
+ agp_bridge.num_aperture_sizes = 7;
+ agp_bridge.dev_private_data = (void *) &ati_generic_private;
+ agp_bridge.needs_scratch_page = FALSE;
+ agp_bridge.configure = ati_configure;
+ agp_bridge.fetch_size = ati_fetch_size;
+ agp_bridge.cleanup = ati_cleanup;
+ agp_bridge.tlb_flush = ati_tlbflush;
+ agp_bridge.mask_memory = ati_mask_memory;
+ agp_bridge.agp_enable = agp_generic_agp_enable;
+ agp_bridge.cache_flush = global_cache_flush;
+ agp_bridge.create_gatt_table = ati_create_gatt_table;
+ agp_bridge.free_gatt_table = ati_free_gatt_table;
+ agp_bridge.insert_memory = ati_insert_memory;
+ agp_bridge.remove_memory = ati_remove_memory;
+ agp_bridge.alloc_by_type = agp_generic_alloc_by_type;
+ agp_bridge.free_by_type = agp_generic_free_by_type;
+ agp_bridge.agp_alloc_page = agp_generic_alloc_page;
+ agp_bridge.agp_destroy_page = agp_generic_destroy_page;
+ agp_bridge.suspend = agp_generic_suspend;
+ agp_bridge.resume = agp_generic_resume;
+ agp_bridge.cant_use_aperture = 0;
+
+ return 0;
+
+ (void) pdev; /* unused */
+}
+#endif /* CONFIG_AGP_ATI */
+
/* per-chipset initialization data.
* note -- all chipsets for a single vendor MUST be grouped together
*/
@@ -5503,6 +5972,18 @@
"Intel",
"i860",
intel_860_setup },
+ { PCI_DEVICE_ID_INTEL_7205_0,
+ PCI_VENDOR_ID_INTEL,
+ INTEL_I7205,
+ "Intel",
+ "i7205",
+ intel_7505_setup },
+ { PCI_DEVICE_ID_INTEL_7505_0,
+ PCI_VENDOR_ID_INTEL,
+ INTEL_I7505,
+ "Intel",
+ "i7505",
+ intel_7505_setup },
{ 0,
PCI_VENDOR_ID_INTEL,
INTEL_GENERIC,
@@ -5693,6 +6174,12 @@
"Via",
"Apollo Pro KT400",
via_generic_setup },
+ { PCI_DEVICE_ID_VIA_CLE266,
+ PCI_VENDOR_ID_VIA,
+ VIA_CLE266,
+ "Via",
+ "CLE266",
+ via_generic_setup },
{ PCI_DEVICE_ID_VIA_P4M266,
PCI_VENDOR_ID_VIA,
VIA_APOLLO_P4M266,
@@ -5728,6 +6215,51 @@
nvidia_generic_setup },
#endif /* CONFIG_AGP_NVIDIA */
+
+#ifdef CONFIG_AGP_ATI
+ { PCI_DEVICE_ID_ATI_RS100,
+ PCI_VENDOR_ID_ATI,
+ ATI_RS100,
+ "ATI",
+ "IGP320/M",
+ ati_generic_setup },
+ { PCI_DEVICE_ID_ATI_RS200,
+ PCI_VENDOR_ID_ATI,
+ ATI_RS200,
+ "ATI",
+ "IGP330/340/345/350/M",
+ ati_generic_setup },
+ { PCI_DEVICE_ID_ATI_RS250,
+ PCI_VENDOR_ID_ATI,
+ ATI_RS250,
+ "ATI",
+ "IGP7000/M",
+ ati_generic_setup },
+ { PCI_DEVICE_ID_ATI_RS300_100,
+ PCI_VENDOR_ID_ATI,
+ ATI_RS300_100,
+ "ATI",
+ "IGP9100/M",
+ ati_generic_setup },
+ { PCI_DEVICE_ID_ATI_RS300_133,
+ PCI_VENDOR_ID_ATI,
+ ATI_RS300_133,
+ "ATI",
+ "IGP9100/M",
+ ati_generic_setup },
+ { PCI_DEVICE_ID_ATI_RS300_166,
+ PCI_VENDOR_ID_ATI,
+ ATI_RS300_166,
+ "ATI",
+ "IGP9100/M",
+ ati_generic_setup },
+ { PCI_DEVICE_ID_ATI_RS300_200,
+ PCI_VENDOR_ID_ATI,
+ ATI_RS300_200,
+ "ATI",
+ "IGP9100/M",
+ ati_generic_setup },
+#endif /* CONFIG_AGP_ATI */
{ 0, }, /* dummy final entry, always present */
};
diff -Nru a/drivers/char/drm/drmP.h b/drivers/char/drm/drmP.h
--- a/drivers/char/drm/drmP.h Wed Oct 8 09:06:27 2003
+++ b/drivers/char/drm/drmP.h Wed Oct 8 09:06:27 2003
@@ -328,16 +328,13 @@
if (len > DRM_PROC_LIMIT) { ret; *eof = 1; return len - offset; }
/* Mapping helper macros */
-#define DRM_IOREMAP(map) \
- (map)->handle = DRM(ioremap)( (map)->offset, (map)->size )
-
#define DRM_IOREMAP_NOCACHE(map) \
(map)->handle = DRM(ioremap_nocache)((map)->offset, (map)->size)
-#define DRM_IOREMAPFREE(map) \
+#define DRM_IOREMAPFREE(map, dev) \
do { \
if ( (map)->handle && (map)->size ) \
- DRM(ioremapfree)( (map)->handle, (map)->size ); \
+ DRM(ioremapfree)( (map)->handle, (map)->size, (dev) ); \
} while (0)
#define DRM_FIND_MAP(_map, _o) \
@@ -789,9 +786,9 @@
extern unsigned long DRM(alloc_pages)(int order, int area);
extern void DRM(free_pages)(unsigned long address, int order,
int area);
-extern void *DRM(ioremap)(unsigned long offset, unsigned long size);
extern void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size);
-extern void DRM(ioremapfree)(void *pt, unsigned long size);
+extern void *DRM(ioremap)(unsigned long offset, unsigned long size, drm_device_t *dev);
+extern void DRM(ioremapfree)(void *pt, unsigned long size, drm_device_t *dev);
#if __REALLY_HAVE_AGP
extern agp_memory *DRM(alloc_agp)(int pages, u32 type);
diff -Nru a/drivers/char/drm/drm_agpsupport.h b/drivers/char/drm/drm_agpsupport.h
--- a/drivers/char/drm/drm_agpsupport.h Wed Oct 8 09:06:26 2003
+++ b/drivers/char/drm/drm_agpsupport.h Wed Oct 8 09:06:26 2003
@@ -265,6 +265,7 @@
}
head->memory = NULL;
+
head->cant_use_aperture = head->agp_info.cant_use_aperture;
head->page_mask = head->agp_info.page_mask;
diff -Nru a/drivers/char/drm/drm_bufs.h b/drivers/char/drm/drm_bufs.h
--- a/drivers/char/drm/drm_bufs.h Wed Oct 8 09:06:26 2003
+++ b/drivers/char/drm/drm_bufs.h Wed Oct 8 09:06:26 2003
@@ -106,7 +106,7 @@
switch ( map->type ) {
case _DRM_REGISTERS:
case _DRM_FRAME_BUFFER:
-#if !defined(__sparc__) && !defined(__alpha__)
+#if !defined(__sparc__) && !defined(__alpha__) && !defined(__ia64__)
if ( map->offset + map->size < map->offset ||
map->offset < virt_to_phys(high_memory) ) {
DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
@@ -123,7 +123,7 @@
MTRR_TYPE_WRCOMB, 1 );
}
#endif
- map->handle = DRM(ioremap)( map->offset, map->size );
+ map->handle = DRM(ioremap)( map->offset, map->size, dev );
break;
case _DRM_SHM:
@@ -245,7 +245,7 @@
DRM_DEBUG("mtrr_del = %d\n", retcode);
}
#endif
- DRM(ioremapfree)(map->handle, map->size);
+ DRM(ioremapfree)(map->handle, map->size, dev);
break;
case _DRM_SHM:
vfree(map->handle);
diff -Nru a/drivers/char/drm/drm_drv.h b/drivers/char/drm/drm_drv.h
--- a/drivers/char/drm/drm_drv.h Wed Oct 8 09:06:26 2003
+++ b/drivers/char/drm/drm_drv.h Wed Oct 8 09:06:26 2003
@@ -443,7 +443,7 @@
DRM_DEBUG( "mtrr_del=%d\n", retcode );
}
#endif
- DRM(ioremapfree)( map->handle, map->size );
+ DRM(ioremapfree)( map->handle, map->size, dev );
break;
case _DRM_SHM:
vfree(map->handle);
diff -Nru a/drivers/char/drm/drm_memory.h b/drivers/char/drm/drm_memory.h
--- a/drivers/char/drm/drm_memory.h Wed Oct 8 09:06:26 2003
+++ b/drivers/char/drm/drm_memory.h Wed Oct 8 09:06:26 2003
@@ -290,9 +290,14 @@
}
}
-void *DRM(ioremap)(unsigned long offset, unsigned long size)
+void *DRM(ioremap)(unsigned long offset, unsigned long size, drm_device_t *dev)
{
void *pt;
+#if __REALLY_HAVE_AGP
+ drm_map_t *map = NULL;
+ drm_map_list_t *r_list;
+ struct list_head *list;
+#endif
if (!size) {
DRM_MEM_ERROR(DRM_MEM_MAPPINGS,
@@ -300,12 +305,50 @@
return NULL;
}
+#if __REALLY_HAVE_AGP
+ if (!dev->agp || dev->agp->cant_use_aperture == 0)
+ goto standard_ioremap;
+
+ list_for_each(list, &dev->maplist->head) {
+ r_list = (drm_map_list_t *)list;
+ map = r_list->map;
+ if (!map) continue;
+ if (map->offset <= offset &&
+ (map->offset + map->size) >= (offset + size))
+ break;
+ }
+
+ if (map && map->type == _DRM_AGP) {
+ struct drm_agp_mem *agpmem;
+
+ for (agpmem = dev->agp->memory; agpmem; agpmem = agpmem->next) {
+ if (agpmem->bound <= offset &&
+ (agpmem->bound + (agpmem->pages
+ << PAGE_SHIFT)) >= (offset + size))
+ break;
+ }
+
+ if (agpmem == NULL)
+ goto ioremap_failure;
+
+ pt = agpmem->memory->vmptr + (offset - agpmem->bound);
+ goto ioremap_success;
+ }
+
+standard_ioremap:
+#endif
if (!(pt = ioremap(offset, size))) {
+#if __REALLY_HAVE_AGP
+ioremap_failure:
+#endif
spin_lock(&DRM(mem_lock));
++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count;
spin_unlock(&DRM(mem_lock));
return NULL;
}
+#if __REALLY_HAVE_AGP
+ioremap_success:
+#endif
spin_lock(&DRM(mem_lock));
++DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count;
DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_allocated += size;
@@ -336,7 +379,7 @@
return pt;
}
-void DRM(ioremapfree)(void *pt, unsigned long size)
+void DRM(ioremapfree)(void *pt, unsigned long size, drm_device_t *dev)
{
int alloc_count;
int free_count;
@@ -344,7 +387,11 @@
if (!pt)
DRM_MEM_ERROR(DRM_MEM_MAPPINGS,
"Attempt to free NULL pointer\n");
+#if __REALLY_HAVE_AGP
+ else if (!dev->agp || dev->agp->cant_use_aperture == 0)
+#else
else
+#endif
iounmap(pt);
spin_lock(&DRM(mem_lock));
diff -Nru a/drivers/char/drm/drm_vm.h b/drivers/char/drm/drm_vm.h
--- a/drivers/char/drm/drm_vm.h Wed Oct 8 09:06:27 2003
+++ b/drivers/char/drm/drm_vm.h Wed Oct 8 09:06:27 2003
@@ -206,7 +206,7 @@
DRM_DEBUG("mtrr_del = %d\n", retcode);
}
#endif
- DRM(ioremapfree)(map->handle, map->size);
+ DRM(ioremapfree)(map->handle, map->size, dev);
break;
case _DRM_SHM:
vfree(map->handle);
@@ -368,6 +368,7 @@
drm_map_list_t *r_list;
unsigned long offset = 0;
struct list_head *list;
+ struct page *page;
DRM_DEBUG("start = 0x%lx, end = 0x%lx, offset = 0x%lx\n",
vma->vm_start, vma->vm_end, VM_OFFSET(vma));
@@ -414,28 +415,30 @@
switch (map->type) {
case _DRM_AGP:
-#if defined(__alpha__)
- /*
- * On Alpha we can't talk to bus dma address from the
- * CPU, so for memory of type DRM_AGP, we'll deal with
- * sorting out the real physical pages and mappings
- * in nopage()
- */
- vma->vm_ops = &DRM(vm_ops);
- break;
+#if __REALLY_HAVE_AGP
+ if (dev->agp->cant_use_aperture) {
+ /*
+ * On some systems we can't talk to bus dma address from
+ * the CPU, so for memory of type DRM_AGP, we'll deal
+ * with sorting out the real physical pages and mappings
+ * in nopage()
+ */
+ vma->vm_ops = &DRM(vm_ops);
+ goto mapswitch_out;
+ }
#endif
/* fall through to _DRM_FRAME_BUFFER... */
case _DRM_FRAME_BUFFER:
case _DRM_REGISTERS:
- if (VM_OFFSET(vma) >= __pa(high_memory)) {
+ page = virt_to_page(__va(VM_OFFSET(vma)));
+ if (!VALID_PAGE(page) || PageReserved(page)) {
#if defined(__i386__) || defined(__x86_64__)
if (boot_cpu_data.x86 > 3 && map->type != _DRM_AGP) {
pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT;
}
#elif defined(__ia64__)
- if (map->type != _DRM_AGP)
- vma->vm_page_prot =
+ vma->vm_page_prot =
pgprot_writecombine(vma->vm_page_prot);
#elif defined(__powerpc__)
pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE | _PAGE_GUARDED;
@@ -474,6 +477,9 @@
default:
return -EINVAL; /* This should never happen. */
}
+#if __REALLY_HAVE_AGP
+mapswitch_out:
+#endif
vma->vm_flags |= VM_RESERVED; /* Don't swap */
vma->vm_file = filp; /* Needed for drm_vm_open() */
diff -Nru a/drivers/char/drm/i810_dma.c b/drivers/char/drm/i810_dma.c
--- a/drivers/char/drm/i810_dma.c Wed Oct 8 09:06:27 2003
+++ b/drivers/char/drm/i810_dma.c Wed Oct 8 09:06:27 2003
@@ -276,7 +276,7 @@
if(dev_priv->ring.virtual_start) {
DRM(ioremapfree)((void *) dev_priv->ring.virtual_start,
- dev_priv->ring.Size);
+ dev_priv->ring.Size, dev);
}
if(dev_priv->hw_status_page != 0UL) {
pci_free_consistent(dev->pdev, PAGE_SIZE,
@@ -292,7 +292,8 @@
for (i = 0; i < dma->buf_count; i++) {
drm_buf_t *buf = dma->buflist[ i ];
drm_i810_buf_priv_t *buf_priv = buf->dev_private;
- DRM(ioremapfree)(buf_priv->kernel_virtual, buf->total);
+ DRM(ioremapfree)(buf_priv->kernel_virtual,
+ buf->total, dev);
}
}
return 0;
@@ -362,7 +363,7 @@
*buf_priv->in_use = I810_BUF_FREE;
buf_priv->kernel_virtual = DRM(ioremap)(buf->bus_address,
- buf->total);
+ buf->total, dev);
}
return 0;
}
@@ -415,7 +416,7 @@
dev_priv->ring.virtual_start = DRM(ioremap)(dev->agp->base +
init->ring_start,
- init->ring_size);
+ init->ring_size, dev);
if (dev_priv->ring.virtual_start == NULL) {
dev->dev_private = (void *) dev_priv;
diff -Nru a/drivers/char/drm/mga_dma.c b/drivers/char/drm/mga_dma.c
--- a/drivers/char/drm/mga_dma.c Wed Oct 8 09:06:27 2003
+++ b/drivers/char/drm/mga_dma.c Wed Oct 8 09:06:27 2003
@@ -556,9 +556,9 @@
(drm_mga_sarea_t *)((u8 *)dev_priv->sarea->handle +
init->sarea_priv_offset);
- DRM_IOREMAP( dev_priv->warp );
- DRM_IOREMAP( dev_priv->primary );
- DRM_IOREMAP( dev_priv->buffers );
+ DRM_IOREMAP( dev_priv->warp, dev );
+ DRM_IOREMAP( dev_priv->primary, dev );
+ DRM_IOREMAP( dev_priv->buffers, dev );
if(!dev_priv->warp->handle ||
!dev_priv->primary->handle ||
@@ -644,9 +644,9 @@
if ( dev->dev_private ) {
drm_mga_private_t *dev_priv = dev->dev_private;
- DRM_IOREMAPFREE( dev_priv->warp );
- DRM_IOREMAPFREE( dev_priv->primary );
- DRM_IOREMAPFREE( dev_priv->buffers );
+ DRM_IOREMAPFREE( dev_priv->warp, dev );
+ DRM_IOREMAPFREE( dev_priv->primary, dev );
+ DRM_IOREMAPFREE( dev_priv->buffers, dev );
if ( dev_priv->head != NULL ) {
mga_freelist_cleanup( dev );
diff -Nru a/drivers/char/drm/r128_cce.c b/drivers/char/drm/r128_cce.c
--- a/drivers/char/drm/r128_cce.c Wed Oct 8 09:06:26 2003
+++ b/drivers/char/drm/r128_cce.c Wed Oct 8 09:06:26 2003
@@ -216,7 +216,22 @@
int i;
for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
+#ifndef CONFIG_AGP_I460
if ( GET_RING_HEAD( &dev_priv->ring ) == dev_priv->ring.tail ) {
+#else
+ /*
+ * XXX - this is (I think) a 460GX specific hack
+ *
+ * When doing texturing, ring.tail sometimes gets ahead of
+ * PM4_BUFFER_DL_WPTR by 2; consequently, the card processes
+ * its whole quota of instructions and *ring.head is still 2
+ * short of ring.tail. Work around this for now in lieu of
+ * a better solution.
+ */
+ if ( GET_RING_HEAD( &dev_priv->ring ) == dev_priv->ring.tail ||
+ ( dev_priv->ring.tail -
+ GET_RING_HEAD( &dev_priv->ring ) ) == 2 ) {
+#endif
int pm4stat = R128_READ( R128_PM4_STAT );
if ( ( (pm4stat & R128_PM4_FIFOCNT_MASK) >=
dev_priv->cce_fifo_size ) &&
@@ -317,7 +332,7 @@
static void r128_cce_init_ring_buffer( drm_device_t *dev,
drm_r128_private_t *dev_priv )
{
- u32 ring_start;
+ u32 ring_start, rptr_addr;
u32 tmp;
DRM_DEBUG( "\n" );
@@ -341,8 +356,24 @@
SET_RING_HEAD( &dev_priv->ring, 0 );
if ( !dev_priv->is_pci ) {
- R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR,
- dev_priv->ring_rptr->offset );
+ /*
+ * 460GX doesn't claim PCI writes from the card into
+ * the AGP aperture, so we have to get space outside
+ * the aperture for RPTR_ADDR.
+ */
+ if ( dev->agp->agp_info.chipset == INTEL_460GX ) {
+ unsigned long alt_rh_off;
+
+ alt_rh_off = __get_free_page(GFP_KERNEL | GFP_DMA);
+ atomic_inc(&virt_to_page(alt_rh_off)->count);
+ set_bit(PG_locked, &virt_to_page(alt_rh_off)->flags);
+
+ dev_priv->ring.head = (__volatile__ u32 *) alt_rh_off;
+ SET_RING_HEAD( &dev_priv->ring, 0 );
+ rptr_addr = __pa( dev_priv->ring.head );
+ } else
+ rptr_addr = dev_priv->ring_rptr->offset;
+ R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR, rptr_addr );
} else {
drm_sg_mem_t *entry = dev->sg;
unsigned long tmp_ofs, page_ofs;
@@ -542,9 +573,9 @@
init->sarea_priv_offset);
if ( !dev_priv->is_pci ) {
- DRM_IOREMAP( dev_priv->cce_ring );
- DRM_IOREMAP( dev_priv->ring_rptr );
- DRM_IOREMAP( dev_priv->buffers );
+ DRM_IOREMAP( dev_priv->cce_ring, dev );
+ DRM_IOREMAP( dev_priv->ring_rptr, dev );
+ DRM_IOREMAP( dev_priv->buffers, dev );
if(!dev_priv->cce_ring->handle ||
!dev_priv->ring_rptr->handle ||
!dev_priv->buffers->handle) {
@@ -618,9 +649,9 @@
#if __REALLY_HAVE_SG
if ( !dev_priv->is_pci ) {
#endif
- DRM_IOREMAPFREE( dev_priv->cce_ring );
- DRM_IOREMAPFREE( dev_priv->ring_rptr );
- DRM_IOREMAPFREE( dev_priv->buffers );
+ DRM_IOREMAPFREE( dev_priv->cce_ring, dev );
+ DRM_IOREMAPFREE( dev_priv->ring_rptr, dev );
+ DRM_IOREMAPFREE( dev_priv->buffers, dev );
#if __REALLY_HAVE_SG
} else {
if (!DRM(ati_pcigart_cleanup)( dev,
@@ -629,7 +660,19 @@
DRM_ERROR( "failed to cleanup PCI GART!\n" );
}
#endif
-
+ /*
+ * Free the page we grabbed for RPTR_ADDR
+ */
+ if ( !dev_priv->is_pci && dev->agp->agp_info.chipset == INTEL_460GX ) {
+ unsigned long alt_rh_off =
+ (unsigned long) dev_priv->ring.head;
+ struct page *p = virt_to_page((void *)alt_rh_off);
+
+ put_page(p);
+ unlock_page(p);
+ free_page(alt_rh_off);
+ }
+
DRM(free)( dev->dev_private, sizeof(drm_r128_private_t),
DRM_MEM_DRIVER );
dev->dev_private = NULL;
diff -Nru a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c
--- a/drivers/char/drm/radeon_cp.c Wed Oct 8 09:06:26 2003
+++ b/drivers/char/drm/radeon_cp.c Wed Oct 8 09:06:26 2003
@@ -854,7 +854,7 @@
static void radeon_cp_init_ring_buffer( drm_device_t *dev,
drm_radeon_private_t *dev_priv )
{
- u32 ring_start, cur_read_ptr;
+ u32 ring_start, cur_read_ptr, rptr_addr;
u32 tmp;
/* Initialize the memory controller */
@@ -892,8 +892,24 @@
dev_priv->ring.tail = cur_read_ptr;
if ( !dev_priv->is_pci ) {
- RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR,
- dev_priv->ring_rptr->offset );
+ /*
+ * 460GX doesn't claim PCI writes from the card into
+ * the AGP aperture, so we have to get space outside
+ * the aperture for RPTR_ADDR.
+ */
+ if ( dev->agp->agp_info.chipset == INTEL_460GX ) {
+ unsigned long alt_rh_off;
+
+ alt_rh_off = __get_free_page(GFP_KERNEL | GFP_DMA);
+ atomic_inc(&virt_to_page(alt_rh_off)->count);
+ set_bit(PG_locked, &virt_to_page(alt_rh_off)->flags);
+
+ dev_priv->ring.head = (__volatile__ u32 *) alt_rh_off;
+ *dev_priv->ring.head = cur_read_ptr;
+ rptr_addr = __pa( dev_priv->ring.head );
+ } else
+ rptr_addr = dev_priv->ring_rptr->offset;
+ RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR, rptr_addr );
} else {
drm_sg_mem_t *entry = dev->sg;
unsigned long tmp_ofs, page_ofs;
@@ -1145,9 +1161,9 @@
init->sarea_priv_offset);
if ( !dev_priv->is_pci ) {
- DRM_IOREMAP( dev_priv->cp_ring );
- DRM_IOREMAP( dev_priv->ring_rptr );
- DRM_IOREMAP( dev_priv->buffers );
+ DRM_IOREMAP( dev_priv->cp_ring, dev );
+ DRM_IOREMAP( dev_priv->ring_rptr, dev );
+ DRM_IOREMAP( dev_priv->buffers, dev );
if(!dev_priv->cp_ring->handle ||
!dev_priv->ring_rptr->handle ||
!dev_priv->buffers->handle) {
@@ -1266,9 +1282,9 @@
drm_radeon_private_t *dev_priv = dev->dev_private;
if ( !dev_priv->is_pci ) {
- DRM_IOREMAPFREE( dev_priv->cp_ring );
- DRM_IOREMAPFREE( dev_priv->ring_rptr );
- DRM_IOREMAPFREE( dev_priv->buffers );
+ DRM_IOREMAPFREE( dev_priv->cp_ring, dev );
+ DRM_IOREMAPFREE( dev_priv->ring_rptr, dev );
+ DRM_IOREMAPFREE( dev_priv->buffers, dev );
} else {
#if __REALLY_HAVE_SG
if (!DRM(ati_pcigart_cleanup)( dev,
@@ -1278,6 +1294,19 @@
#endif /* __REALLY_HAVE_SG */
}
+ /*
+ * Free the page we grabbed for RPTR_ADDR
+ */
+ if ( !dev_priv->is_pci && dev->agp->agp_info.chipset == INTEL_460GX ) {
+ unsigned long alt_rh_off =
+ (unsigned long) dev_priv->ring.head;
+ struct page *p = virt_to_page((void *)alt_rh_off);
+
+ put_page(p);
+ unlock_page(p);
+ free_page(alt_rh_off);
+ }
+
DRM(free)( dev->dev_private, sizeof(drm_radeon_private_t),
DRM_MEM_DRIVER );
dev->dev_private = NULL;
diff -Nru a/drivers/char/drm-4.0/agpsupport.c b/drivers/char/drm-4.0/agpsupport.c
--- a/drivers/char/drm-4.0/agpsupport.c Wed Oct 8 09:06:27 2003
+++ b/drivers/char/drm-4.0/agpsupport.c Wed Oct 8 09:06:27 2003
@@ -30,6 +30,7 @@
#define __NO_VERSION__
#include "drmP.h"
+#include <linux/config.h>
#include <linux/module.h>
#if LINUX_VERSION_CODE < 0x020400
#include "agpsupport-pre24.h"
@@ -264,6 +265,7 @@
#if LINUX_VERSION_CODE >= 0x020400
case INTEL_I840: head->chipset = "Intel i840"; break;
#endif
+ case INTEL_460GX: head->chipset = "Intel 460GX"; break;
case VIA_GENERIC: head->chipset = "VIA"; break;
case VIA_VP3: head->chipset = "VIA VP3"; break;
@@ -301,8 +303,17 @@
case SVWRKS_HE: head->chipset = "Serverworks HE"; break;
case SVWRKS_LE: head->chipset = "Serverworks LE"; break;
+ case HP_ZX1: head->chipset = "HP ZX1"; break;
+
default: head->chipset = "Unknown"; break;
}
+#if LINUX_VERSION_CODE <= 0x020408
+ head->cant_use_aperture = 0;
+ head->page_mask = ~(0xfff);
+#else
+ head->cant_use_aperture = head->agp_info.cant_use_aperture;
+ head->page_mask = head->agp_info.page_mask;
+#endif
DRM_INFO("AGP %d.%d on %s @ 0x%08lx %ZuMB\n",
head->agp_info.version.major,
head->agp_info.version.minor,
diff -Nru a/drivers/net/Makefile b/drivers/net/Makefile
--- a/drivers/net/Makefile Wed Oct 8 09:06:26 2003
+++ b/drivers/net/Makefile Wed Oct 8 09:06:26 2003
@@ -153,6 +153,7 @@
obj-$(CONFIG_NE3210) += ne3210.o 8390.o
obj-$(CONFIG_NET_SB1250_MAC) += sb1250-mac.o
obj-$(CONFIG_B44) += b44.o
+obj-$(CONFIG_HP_SIMETH) += simeth.o
obj-$(CONFIG_PPP) += ppp_generic.o slhc.o
obj-$(CONFIG_PPP_ASYNC) += ppp_async.o
diff -Nru a/drivers/pci/pci.c b/drivers/pci/pci.c
--- a/drivers/pci/pci.c Wed Oct 8 09:06:26 2003
+++ b/drivers/pci/pci.c Wed Oct 8 09:06:26 2003
@@ -1061,8 +1061,14 @@
{
unsigned int pos, reg, next;
u32 l, sz;
+ u16 cmd;
struct resource *res;
+ /* Disable I/O & memory decoding while we size the BARs. */
+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
+ pci_write_config_word(dev, PCI_COMMAND,
+ cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
+
for(pos=0; pos<howmany; pos = next) {
next = pos+1;
res = &dev->resource[pos];
@@ -1127,13 +1133,16 @@
if (sz && sz != 0xffffffff) {
sz = pci_size(l, sz, PCI_ROM_ADDRESS_MASK);
if (!sz)
- return;
+ goto out;
res->flags = (l & PCI_ROM_ADDRESS_ENABLE) |
IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
res->start = l & PCI_ROM_ADDRESS_MASK;
res->end = res->start + (unsigned long) sz;
}
}
+
+out:
+ pci_write_config_word(dev, PCI_COMMAND, cmd);
}
void __devinit pci_read_bridge_bases(struct pci_bus *child)
@@ -2053,16 +2062,16 @@
int map, block;
if ((page = pool_find_page (pool, dma)) == 0) {
- printk (KERN_ERR "pci_pool_free %s/%s, %p/%x (bad dma)\n",
+ printk (KERN_ERR "pci_pool_free %s/%s, %p/%lx (bad dma)\n",
pool->dev ? pool->dev->slot_name : NULL,
- pool->name, vaddr, (int) (dma & 0xffffffff));
+ pool->name, vaddr, (unsigned long) dma);
return;
}
#ifdef CONFIG_PCIPOOL_DEBUG
if (((dma - page->dma) + (void *)page->vaddr) != vaddr) {
- printk (KERN_ERR "pci_pool_free %s/%s, %p (bad vaddr)/%x\n",
+ printk (KERN_ERR "pci_pool_free %s/%s, %p (bad vaddr)/%lx\n",
pool->dev ? pool->dev->slot_name : NULL,
- pool->name, vaddr, (int) (dma & 0xffffffff));
+ pool->name, vaddr, (unsigned long) dma);
return;
}
#endif
diff -Nru a/fs/inode.c b/fs/inode.c
--- a/fs/inode.c Wed Oct 8 09:06:27 2003
+++ b/fs/inode.c Wed Oct 8 09:06:27 2003
@@ -56,7 +56,7 @@
*/
static LIST_HEAD(inode_in_use);
-static LIST_HEAD(inode_unused);
+LIST_HEAD(inode_unused);
static struct list_head *inode_hashtable;
static LIST_HEAD(anon_hash_chain); /* for inodes with NULL i_sb */
diff -Nru a/fs/proc/proc_misc.c b/fs/proc/proc_misc.c
--- a/fs/proc/proc_misc.c Wed Oct 8 09:06:26 2003
+++ b/fs/proc/proc_misc.c Wed Oct 8 09:06:26 2003
@@ -36,6 +36,7 @@
#include <linux/init.h>
#include <linux/smp_lock.h>
#include <linux/seq_file.h>
+#include <linux/hugetlb.h>
#include <linux/sysrq.h>
#include <asm/uaccess.h>
@@ -209,6 +210,8 @@
K(i.freeram-i.freehigh),
K(i.totalswap),
K(i.freeswap));
+
+ len += hugetlb_report_meminfo(page + len);
return proc_calc_metrics(page, start, off, count, eof, len);
#undef B
diff -Nru a/include/asm-ia64/page.h b/include/asm-ia64/page.h
--- a/include/asm-ia64/page.h Wed Oct 8 09:06:26 2003
+++ b/include/asm-ia64/page.h Wed Oct 8 09:06:26 2003
@@ -30,6 +30,33 @@
#define PAGE_MASK (~(PAGE_SIZE - 1))
#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
+#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE_SIZE_4GB)
+#define HPAGE_SHIFT 32
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_1GB)
+#define HPAGE_SHIFT 30
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_256MB)
+#define HPAGE_SHIFT 28
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
+#define HPAGE_SHIFT 26
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_16MB)
+#define HPAGE_SHIFT 24
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
+#define HPAGE_SHIFT 22
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
+#define HPAGE_SHIFT 20
+#elif defined(CONFIG_HUGETLB_PAGE_SIZE_256KB)
+#define HPAGE_SHIFT 18
+#else
+# error Unsupported IA-64 HugeTLB Page Size!
+#endif
+
+#define REGION_HPAGE (4UL)
+#define REGION_SHIFT 61
+#define HPAGE_SIZE (__IA64_UL_CONST(1) << HPAGE_SHIFT)
+#define HPAGE_MASK (~(HPAGE_SIZE - 1))
+#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
+#endif
#define RGN_MAP_LIMIT ((1UL << (4*PAGE_SHIFT - 12)) - PAGE_SIZE) /* per region addr limit */
#ifdef __ASSEMBLY__
@@ -84,6 +111,14 @@
#define REGION_SIZE REGION_NUMBER(1)
#define REGION_KERNEL 7
+
+#ifdef CONFIG_HUGETLB_PAGE
+#define htlbpage_to_page(x) ((REGION_NUMBER(x) << 61) | (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT)))
+#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
+extern int is_invalid_hugepage_range(unsigned long addr, unsigned long len);
+#else
+#define is_invalid_hugepage_range(addr, len) 0
+#endif
#define BUG() do { printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); *(int *)0=0; } while (0)
#define PAGE_BUG(page) do { BUG(); } while (0)
diff -Nru a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
--- a/include/asm-ia64/processor.h Wed Oct 8 09:06:27 2003
+++ b/include/asm-ia64/processor.h Wed Oct 8 09:06:27 2003
@@ -172,6 +172,7 @@
__u32 ptce_count[2];
__u32 ptce_stride[2];
struct task_struct *ksoftirqd; /* kernel softirq daemon for this CPU */
+ void *mmu_gathers;
# ifdef CONFIG_PERFMON
unsigned long pfm_syst_info;
# endif
diff -Nru a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
--- a/include/asm-ppc/pgtable.h Wed Oct 8 09:06:26 2003
+++ b/include/asm-ppc/pgtable.h Wed Oct 8 09:06:26 2003
@@ -593,6 +593,11 @@
pte_update(ptep, 0, _PAGE_DIRTY);
}
+/*
+ * Macro to mark a page protection value as "uncacheable".
+ */
+#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
+
#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0)
#define pmd_page(pmd) (pmd_val(pmd))
diff -Nru a/include/linux/agp_backend.h b/include/linux/agp_backend.h
--- a/include/linux/agp_backend.h Wed Oct 8 09:06:27 2003
+++ b/include/linux/agp_backend.h Wed Oct 8 09:06:27 2003
@@ -57,6 +57,7 @@
INTEL_I865_G,
INTEL_I7205,
INTEL_I7505,
+ INTEL_460GX,
VIA_GENERIC,
VIA_VP3,
VIA_MVP3,
@@ -140,6 +141,7 @@
size_t page_count;
int num_scratch_pages;
unsigned long *memory;
+ void *vmptr;
off_t pg_start;
u32 type;
u32 physical;
diff -Nru a/include/linux/fs.h b/include/linux/fs.h
--- a/include/linux/fs.h Wed Oct 8 09:06:26 2003
+++ b/include/linux/fs.h Wed Oct 8 09:06:26 2003
@@ -246,7 +246,7 @@
/* First cache line: */
struct buffer_head *b_next; /* Hash queue list */
unsigned long b_blocknr; /* block number */
- unsigned short b_size; /* block size */
+ unsigned int b_size; /* block size */
unsigned short b_list; /* List that this buffer appears */
kdev_t b_dev; /* device (B_FREE = free) */
diff -Nru a/include/linux/sysctl.h b/include/linux/sysctl.h
--- a/include/linux/sysctl.h Wed Oct 8 09:06:26 2003
+++ b/include/linux/sysctl.h Wed Oct 8 09:06:26 2003
@@ -148,6 +148,7 @@
VM_MIN_READAHEAD=12, /* Min file readahead */
VM_MAX_READAHEAD=13, /* Max file readahead */
VM_PAGEBUF=17, /* struct: Control pagebuf parameters */
+ VM_HUGETLB_PAGES=18, /* int: Number of available Huge Pages */
};
diff -Nru a/init/main.c b/init/main.c
--- a/init/main.c Wed Oct 8 09:06:26 2003
+++ b/init/main.c Wed Oct 8 09:06:26 2003
@@ -291,6 +291,7 @@
extern void setup_arch(char **);
+extern void __init build_all_zonelists(void);
extern void cpu_idle(void);
unsigned long wait_init_idle;
@@ -361,6 +362,7 @@
lock_kernel();
printk(linux_banner);
setup_arch(&command_line);
+ build_all_zonelists();
printk("Kernel command line: %s\n", saved_command_line);
parse_options(command_line);
trap_init();
diff -Nru a/kernel/printk.c b/kernel/printk.c
--- a/kernel/printk.c Wed Oct 8 09:06:27 2003
+++ b/kernel/printk.c Wed Oct 8 09:06:27 2003
@@ -330,6 +330,12 @@
__call_console_drivers(start, end);
}
}
+#ifdef CONFIG_IA64_EARLY_PRINTK
+ if (!console_drivers) {
+ void early_printk (const char *str, size_t len);
+ early_printk(&LOG_BUF(start), end - start);
+ }
+#endif
}
/*
@@ -696,3 +702,101 @@
tty->driver.write(tty, 0, msg, strlen(msg));
return;
}
+
+#ifdef CONFIG_IA64_EARLY_PRINTK
+
+#include <asm/io.h>
+
+#ifdef CONFIG_IA64_EARLY_PRINTK_UART
+
+#include <linux/serial_reg.h>
+#include <asm/system.h>
+
+static void early_printk_uart(const char *str, size_t len)
+{
+ static char *uart = 0;
+ unsigned long uart_base;
+ char c;
+
+ if (!uart) {
+#ifdef CONFIG_SERIAL_HCDP
+ extern unsigned long hcdp_early_uart(void);
+ uart_base = hcdp_early_uart();
+#endif
+#if CONFIG_IA64_EARLY_PRINTK_UART_BASE
+ uart_base = CONFIG_IA64_EARLY_PRINTK_UART_BASE;
+#endif
+ if (uart_base)
+ uart = ioremap(uart_base, 64);
+ }
+
+ if (!uart)
+ return;
+
+ while (len-- > 0) {
+ c = *str++;
+ while (!(UART_LSR_TEMT & readb(uart + UART_LSR)))
+ ; /* spin */
+
+ writeb(c, uart + UART_TX);
+
+ if (c == '\n')
+ writeb('\r', uart + UART_TX);
+ }
+}
+#endif /* CONFIG_IA64_EARLY_PRINTK_UART */
+
+#ifdef CONFIG_IA64_EARLY_PRINTK_VGA
+
+#define VGABASE ((char *)0xc0000000000b8000)
+#define VGALINES 24
+#define VGACOLS 80
+
+static int current_ypos = VGALINES, current_xpos = 0;
+
+static void early_printk_vga(const char *str, size_t len)
+{
+ char c;
+ int i, k, j;
+
+ while (len-- > 0) {
+ c = *str++;
+ if (current_ypos >= VGALINES) {
+ /* scroll 1 line up */
+ for (k = 1, j = 0; k < VGALINES; k++, j++) {
+ for (i = 0; i < VGACOLS; i++) {
+ writew(readw(VGABASE + 2*(VGACOLS*k + i)),
+ VGABASE + 2*(VGACOLS*j + i));
+ }
+ }
+ for (i = 0; i < VGACOLS; i++) {
+ writew(0x720, VGABASE + 2*(VGACOLS*j + i));
+ }
+ current_ypos = VGALINES-1;
+ }
+ if (c == '\n') {
+ current_xpos = 0;
+ current_ypos++;
+ } else if (c != '\r') {
+ writew(((0x7 << 8) | (unsigned short) c),
+ VGABASE + 2*(VGACOLS*current_ypos + current_xpos++));
+ if (current_xpos >= VGACOLS) {
+ current_xpos = 0;
+ current_ypos++;
+ }
+ }
+ }
+}
+#endif /* CONFIG_IA64_EARLY_PRINTK_VGA */
+
+void early_printk(const char *str, size_t len)
+{
+#ifdef CONFIG_IA64_EARLY_PRINTK_UART
+ early_printk_uart(str, len);
+#endif
+#ifdef CONFIG_IA64_EARLY_PRINTK_VGA
+ early_printk_vga(str, len);
+#endif
+}
+
+#endif /* CONFIG_IA64_EARLY_PRINTK */
diff -Nru a/kernel/sysctl.c b/kernel/sysctl.c
--- a/kernel/sysctl.c Wed Oct 8 09:06:26 2003
+++ b/kernel/sysctl.c Wed Oct 8 09:06:26 2003
@@ -30,6 +30,7 @@
#include <linux/init.h>
#include <linux/sysrq.h>
#include <linux/highuid.h>
+#include <linux/hugetlb.h>
#include <asm/uaccess.h>
@@ -293,6 +294,10 @@
&vm_max_readahead,sizeof(int), 0644, NULL, &proc_dointvec},
{VM_MAX_MAP_COUNT, "max_map_count",
&max_map_count, sizeof(int), 0644, NULL, &proc_dointvec},
+#ifdef CONFIG_HUGETLB_PAGE
+ {VM_HUGETLB_PAGES, "nr_hugepages", &htlbpage_max, sizeof(int), 0644, NULL,
+ &hugetlb_sysctl_handler},
+#endif
{0}
};
diff -Nru a/mm/memory.c b/mm/memory.c
--- a/mm/memory.c Wed Oct 8 09:06:27 2003
+++ b/mm/memory.c Wed Oct 8 09:06:27 2003
@@ -37,6 +37,7 @@
*/
#include <linux/mm.h>
+#include <linux/hugetlb.h>
#include <linux/mman.h>
#include <linux/swap.h>
#include <linux/smp_lock.h>
@@ -121,7 +122,7 @@
pmd = pmd_offset(dir, 0);
pgd_clear(dir);
for (j = 0; j < PTRS_PER_PMD ; j++) {
- prefetchw(pmd+j+(PREFETCH_STRIDE/16));
+ prefetchw(pmd + j + PREFETCH_STRIDE/sizeof(*pmd));
free_one_pmd(pmd+j);
}
pmd_free(pmd);
@@ -181,6 +182,9 @@
unsigned long end = vma->vm_end;
unsigned long cow = (vma->vm_flags & (VM_SHARED | VM_MAYWRITE)) == VM_MAYWRITE;
+ if (is_vm_hugetlb_page(vma))
+ return copy_hugetlb_page_range(dst, src, vma);
+
src_pgd = pgd_offset(src, address)-1;
dst_pgd = pgd_offset(dst, address)-1;
@@ -473,6 +477,10 @@
if ( !vma || (pages && vma->vm_flags & VM_IO) || !(flags & vma->vm_flags) )
return i ? : -EFAULT;
+ if (is_vm_hugetlb_page(vma)) {
+ i = follow_hugetlb_page(mm, vma, pages, vmas, &start, &len, i);
+ continue;
+ }
spin_lock(&mm->page_table_lock);
do {
struct page *map;
@@ -1369,6 +1377,9 @@
current->state = TASK_RUNNING;
pgd = pgd_offset(mm, address);
+
+ if (is_vm_hugetlb_page(vma))
+ return 0; /* mapping truncation does this. */
/*
* We need the page table lock to synchronize with kswapd
diff -Nru a/mm/mprotect.c b/mm/mprotect.c
--- a/mm/mprotect.c Wed Oct 8 09:06:27 2003
+++ b/mm/mprotect.c Wed Oct 8 09:06:27 2003
@@ -7,6 +7,7 @@
#include <linux/smp_lock.h>
#include <linux/shm.h>
#include <linux/mman.h>
+#include <linux/hugetlb.h>
#include <asm/uaccess.h>
#include <asm/pgalloc.h>
@@ -294,6 +295,10 @@
/* Here we know that vma->vm_start <= nstart < vma->vm_end. */
+ if (is_vm_hugetlb_page(vma)) {
+ error = -EACCES;
+ goto out;
+ }
newflags = prot | (vma->vm_flags & ~(PROT_READ | PROT_WRITE | PROT_EXEC));
if ((newflags & ~(newflags >> 4)) & 0xf) {
error = -EACCES;